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| author | Ivan Maidanski <ivmai@mail.ru> | 2013-01-06 19:51:57 +0400 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2013-01-06 19:51:57 +0400 |
| commit | cbec24637bc6562706203c1798130bc2a1924740 (patch) | |
| tree | eda23158931fee766b350788b5064e8e43a942a1 | |
| parent | ef7a115b900eb5222ed89bb3bcfbe743af41a12d (diff) | |
| download | libatomic_ops-cbec24637bc6562706203c1798130bc2a1924740.tar.gz | |
Implement AO_double_load/store based on guaranteed x86 access atomicity
* src/atomic_ops/sysdeps/gcc/x86.h: Define
AO_ACCESS_double_CHECK_ALIGNED and include double_atomic_load_store.h
after inclusion of standard_ao_double_t.h (only if AO_t is 32-bit).
* src/atomic_ops/sysdeps/msftc/x86.h: Likewise.
* src/atomic_ops/sysdeps/sunc/x86.h: Likewise.
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/x86.h | 11 | ||||
| -rw-r--r-- | src/atomic_ops/sysdeps/msftc/x86.h | 5 | ||||
| -rw-r--r-- | src/atomic_ops/sysdeps/sunc/x86.h | 5 |
3 files changed, 21 insertions, 0 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/x86.h b/src/atomic_ops/sysdeps/gcc/x86.h index ad28d6d..6f9953d 100644 --- a/src/atomic_ops/sysdeps/gcc/x86.h +++ b/src/atomic_ops/sysdeps/gcc/x86.h @@ -182,6 +182,12 @@ AO_fetch_compare_and_swap_full(volatile AO_t *addr, AO_t old_val, #if !defined(__x86_64__) && !defined(AO_USE_SYNC_CAS_BUILTIN) # include "../standard_ao_double_t.h" + /* Reading or writing a quadword aligned on a 64-bit boundary is */ + /* always carried out atomically on at least a Pentium according to */ + /* Chapter 8.1.1 of Volume 3A Part 1 of Intel processor manuals. */ +# define AO_ACCESS_double_CHECK_ALIGNED +# include "../loadstore/double_atomic_load_store.h" + /* Returns nonzero if the comparison succeeded. */ /* Really requires at least a Pentium. */ AO_INLINE int @@ -249,6 +255,11 @@ AO_fetch_compare_and_swap_full(volatile AO_t *addr, AO_t old_val, #elif defined(__ILP32__) || !defined(__x86_64__) # include "../standard_ao_double_t.h" + /* Reading or writing a quadword aligned on a 64-bit boundary is */ + /* always carried out atomically (requires at least a Pentium). */ +# define AO_ACCESS_double_CHECK_ALIGNED +# include "../loadstore/double_atomic_load_store.h" + /* X32 has native support for 64-bit integer operations (AO_double_t */ /* is a 64-bit integer and we could use 64-bit cmpxchg). */ /* This primitive is used by compare_double_and_swap_double_full. */ diff --git a/src/atomic_ops/sysdeps/msftc/x86.h b/src/atomic_ops/sysdeps/msftc/x86.h index f6b2a1b..3d31c32 100644 --- a/src/atomic_ops/sysdeps/msftc/x86.h +++ b/src/atomic_ops/sysdeps/msftc/x86.h @@ -119,6 +119,11 @@ AO_test_and_set_full(volatile AO_TS_t *addr) #ifdef AO_ASSUME_VISTA # include "../standard_ao_double_t.h" + /* Reading or writing a quadword aligned on a 64-bit boundary is */ + /* always carried out atomically (requires at least a Pentium). */ +# define AO_ACCESS_double_CHECK_ALIGNED +# include "../loadstore/double_atomic_load_store.h" + /* Whenever we run on a Pentium class machine, we have that certain */ /* function. */ # pragma intrinsic (_InterlockedCompareExchange64) diff --git a/src/atomic_ops/sysdeps/sunc/x86.h b/src/atomic_ops/sysdeps/sunc/x86.h index 12b2e21..a7468bb 100644 --- a/src/atomic_ops/sysdeps/sunc/x86.h +++ b/src/atomic_ops/sysdeps/sunc/x86.h @@ -168,6 +168,11 @@ AO_fetch_compare_and_swap_full(volatile AO_t *addr, AO_t old_val, # ifndef AO_NO_CMPXCHG8B # include "../standard_ao_double_t.h" + /* Reading or writing a quadword aligned on a 64-bit boundary is */ + /* always carried out atomically (requires at least a Pentium). */ +# define AO_ACCESS_double_CHECK_ALIGNED +# include "../loadstore/double_atomic_load_store.h" + /* Returns nonzero if the comparison succeeded. */ /* Really requires at least a Pentium. */ AO_INLINE int |