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| author | James Cowgill <james410@cowgill.org.uk> | 2015-01-08 16:05:57 +0000 |
|---|---|---|
| committer | James Cowgill <james410@cowgill.org.uk> | 2015-01-08 16:05:57 +0000 |
| commit | 0f838defa3e466aff725213638f90e850430f2f9 (patch) | |
| tree | 089e249042e8a813776c878b89409c8977076da2 | |
| parent | 54d1da56809b892d2fc521fea0fd41ea8c23e4f2 (diff) | |
| download | libatomic_ops-0f838defa3e466aff725213638f90e850430f2f9.tar.gz | |
Remove inclusion of acquire_release_volatile.h on mips
I'm not entirely sure how this ended up here. It might have been the case
that MIPS processors used to do this, but the ISA manuals don't say anything
about volatile loads / stores having aquire / release semnatics, so just
remove it to be safe.
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/mips.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h index 83a6bd3..f3796ea 100644 --- a/src/atomic_ops/sysdeps/gcc/mips.h +++ b/src/atomic_ops/sysdeps/gcc/mips.h @@ -19,8 +19,6 @@ #include "../all_aligned_atomic_load_store.h" -#include "../loadstore/acquire_release_volatile.h" - #include "../test_and_set_t_is_ao_t.h" /* Data dependence does not imply read ordering. */ |