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| author | Steve Capper <steve.capper@linaro.org> | 2014-10-30 01:16:14 +0300 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2014-10-30 01:16:14 +0300 |
| commit | 719d90c7f805189f133cf9a140eb79879bf98e92 (patch) | |
| tree | 5eb5c13897d56fcad660a9f56d09f3237350006a | |
| parent | 4e22546e8a161b6bab93e43c115a22151daf45c5 (diff) | |
| download | libatomic_ops-719d90c7f805189f133cf9a140eb79879bf98e92.tar.gz | |
Relax shareability domain for dmb st in AO_nop_write (ARM/AArch64)
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_nop_write): Replace "dmb st"
to "dmb ishst" (this way the barriers will occupy the inner shareable
domain).
* src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_write): Likewise.
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/aarch64.h | 3 | ||||
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/arm.h | 11 |
2 files changed, 12 insertions, 2 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/aarch64.h b/src/atomic_ops/sysdeps/gcc/aarch64.h index 54e6d7f..f969f13 100644 --- a/src/atomic_ops/sysdeps/gcc/aarch64.h +++ b/src/atomic_ops/sysdeps/gcc/aarch64.h @@ -23,7 +23,8 @@ AO_INLINE void AO_nop_write(void) { - __asm__ __volatile__("dmb st" : : : "memory"); + /* TODO: Use C++11 primitive. */ + __asm__ __volatile__("dmb ishst" : : : "memory"); } # define AO_HAVE_nop_write #endif diff --git a/src/atomic_ops/sysdeps/gcc/arm.h b/src/atomic_ops/sysdeps/gcc/arm.h index c19f6da..3d841e9 100644 --- a/src/atomic_ops/sysdeps/gcc/arm.h +++ b/src/atomic_ops/sysdeps/gcc/arm.h @@ -111,7 +111,16 @@ AO_nop_write(void) { /* AO_THUMB_GO_ARM is empty. */ - __asm__ __volatile__("dmb st" : : : "memory"); + /* This will target the system domain and thus be overly */ + /* conservative as the CPUs will occupy the inner shareable domain. */ + /* The plain variant (dmb st) is theoretically slower, and should */ + /* not be needed. That said, with limited experimentation, a CPU */ + /* implementation for which it actually matters has not been found */ + /* yet, though they should already exist. */ + /* Anyway, note that the "st" and "ishst" barriers are actually */ + /* quite weak and, as the libatomic_ops documentation states, */ + /* usually not what you really want. */ + __asm__ __volatile__("dmb ishst" : : : "memory"); } # define AO_HAVE_nop_write |