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| author | Ivan Maidanski <ivmai@mail.ru> | 2020-03-12 09:51:57 +0300 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2020-03-12 09:51:57 +0300 |
| commit | 197aedec657b799b0d19ceb3187893357ccd86fc (patch) | |
| tree | e3d7daa15d66e75c0028b9a3b658809c601b6d2d | |
| parent | b8366318be6ef036d6fad60e11f13eea23533163 (diff) | |
| download | libatomic_ops-197aedec657b799b0d19ceb3187893357ccd86fc.tar.gz | |
Fix asm constraints of primitives in sunc/x86_64.h
(fix of commit 2dee407)
* src/atomic_ops/sysdeps/sunc/x86_64.h (AO_fetch_and_add_full,
AO_char_fetch_and_add_full, AO_short_fetch_and_add_full,
AO_int_fetch_and_add_full, AO_or_full, AO_test_and_set_full,
AO_compare_and_swap_full): Use "+m" asm constraint for *addr instead
of "=m" (because the value pointed by addr is read and written by the
code).
* src/atomic_ops/sysdeps/sunc/x86_64.h [AO_CMPXCHG16B_AVAILABLE]
(AO_compare_double_and_swap_double_full): Likewise.
| -rw-r--r-- | src/atomic_ops/sysdeps/sunc/x86_64.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/atomic_ops/sysdeps/sunc/x86_64.h b/src/atomic_ops/sysdeps/sunc/x86_64.h index 5c66f42..2350410 100644 --- a/src/atomic_ops/sysdeps/sunc/x86_64.h +++ b/src/atomic_ops/sysdeps/sunc/x86_64.h @@ -48,7 +48,7 @@ AO_fetch_and_add_full (volatile AO_t *p, AO_t incr) AO_t result; __asm__ __volatile__ ("lock; xaddq %0, %1" : - "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ + "=r" (result), "+m" (*p) : "0" (incr) : "memory"); return result; } @@ -60,7 +60,7 @@ AO_char_fetch_and_add_full (volatile unsigned char *p, unsigned char incr) unsigned char result; __asm__ __volatile__ ("lock; xaddb %0, %1" : - "=q" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ + "=q" (result), "+m" (*p) : "0" (incr) : "memory"); return result; } @@ -72,7 +72,7 @@ AO_short_fetch_and_add_full (volatile unsigned short *p, unsigned short incr) unsigned short result; __asm__ __volatile__ ("lock; xaddw %0, %1" : - "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ + "=r" (result), "+m" (*p) : "0" (incr) : "memory"); return result; } @@ -84,7 +84,7 @@ AO_int_fetch_and_add_full (volatile unsigned int *p, unsigned int incr) unsigned int result; __asm__ __volatile__ ("lock; xaddl %0, %1" : - "=r" (result), "=m" (*p) : "0" (incr) /* , "m" (*p) */ + "=r" (result), "+m" (*p) : "0" (incr) : "memory"); return result; } @@ -94,7 +94,7 @@ AO_INLINE void AO_or_full (volatile AO_t *p, AO_t incr) { __asm__ __volatile__ ("lock; orq %1, %0" : - "=m" (*p) : "r" (incr) /* , "m" (*p) */ + "+m" (*p) : "r" (incr) : "memory"); } #define AO_HAVE_or_full @@ -105,8 +105,8 @@ AO_test_and_set_full (volatile AO_TS_t *addr) AO_TS_t oldval; /* Note: the "xchg" instruction does not need a "lock" prefix */ __asm__ __volatile__ ("xchg %b0, %1" - : "=q"(oldval), "=m"(*addr) - : "0"(0xff) /* , "m"(*addr) */ + : "=q" (oldval), "+m" (*addr) + : "0"(0xff) : "memory"); return (AO_TS_VAL_t)oldval; } @@ -118,7 +118,7 @@ AO_compare_and_swap_full (volatile AO_t *addr, AO_t old, AO_t new_val) { char result; __asm__ __volatile__ ("lock; cmpxchgq %2, %0; setz %1" - : "=m"(*addr), "=a"(result) + : "+m" (*addr), "=a" (result) : "r" (new_val), "a"(old) : "memory"); return (int) result; } @@ -141,8 +141,8 @@ AO_compare_double_and_swap_double_full (volatile AO_double_t *addr, { char result; __asm__ __volatile__ ("lock; cmpxchg16b %0; setz %1" - : "=m"(*addr), "=a"(result) - : /* "m" (*addr), */ "d" (old_val2), "a" (old_val1), + : "+m" (*addr), "=a" (result) + : "d" (old_val2), "a" (old_val1), "c" (new_val2), "b" (new_val1) : "memory"); return (int) result; } |