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| author | Ivan Maidanski <ivmai@mail.ru> | 2013-03-05 01:02:19 +0400 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2013-03-05 01:02:19 +0400 |
| commit | 1ce472e50783c92a0b4c0d8b966bd7cc04f4cbe5 (patch) | |
| tree | 0d21fac39b827dba98e4f55bf420d908e8abb8ca /src | |
| parent | f4da7f03b6e11cda653955052fcc403c981ff110 (diff) | |
| download | libatomic_ops-1ce472e50783c92a0b4c0d8b966bd7cc04f4cbe5.tar.gz | |
Use AO_EXPECT_FALSE for AArch64 double_load/store
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_HAVE_DOUBLE_PTR_STORAGE):
Do not check (since defined in standard_ao_double_t.h for AArch64).
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_load): Add TODO
items.
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_load,
AO_double_load_acquire, AO_double_store, AO_double_store_release):
Use AO_EXPECT_FALSE.
Diffstat (limited to 'src')
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/aarch64.h | 34 |
1 files changed, 20 insertions, 14 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/aarch64.h b/src/atomic_ops/sysdeps/gcc/aarch64.h index 7c2db2f..b4c937b 100644 --- a/src/atomic_ops/sysdeps/gcc/aarch64.h +++ b/src/atomic_ops/sysdeps/gcc/aarch64.h @@ -28,7 +28,10 @@ # define AO_HAVE_nop_write #endif -#ifdef AO_HAVE_DOUBLE_PTR_STORAGE +/* TODO: Adjust version check on fixing double-wide AO support in GCC. */ +#if __GNUC__ == 4 + + /* TODO: Adjust clobber lists. */ AO_INLINE AO_double_t AO_double_load(const volatile AO_double_t *addr) @@ -36,14 +39,15 @@ AO_double_t result; int status; + /* TODO: Could we discard stxp like for 32-bit ARM? */ do { - __asm__ __volatile__("//AO_double_load\n" + __asm__ __volatile__("@AO_double_load\n" " ldxp %0, %1, [%3]\n" " stxp %w2, %0, %1, [%3]" : "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status) : "r" (addr) ); - } while (status); + } while (AO_EXPECT_FALSE(status)); return result; } # define AO_HAVE_double_load @@ -55,13 +59,13 @@ int status; do { - __asm__ __volatile__("//AO_double_load_acquire\n" + __asm__ __volatile__("@AO_double_load_acquire\n" " ldaxp %0, %1, [%3]\n" " stxp %w2, %0, %1, [%3]" : "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status) : "r" (addr) ); - } while (status); + } while (AO_EXPECT_FALSE(status)); return result; } # define AO_HAVE_double_load_acquire @@ -73,13 +77,14 @@ int status; do { - __asm__ __volatile__("//AO_double_store\n" + __asm__ __volatile__("@AO_double_store\n" " ldxp %0, %1, %3\n" " stxp %w2, %4, %5, %3" - : "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status), "+Q" (*addr) + : "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status), + "+Q" (*addr) : "r" (value.AO_val1), "r" (value.AO_val2) ); - } while (status); + } while (AO_EXPECT_FALSE(status)); } # define AO_HAVE_double_store @@ -90,13 +95,14 @@ int status; do { - __asm__ __volatile__("//AO_double_store\n" + __asm__ __volatile__("@AO_double_store_release\n" " ldxp %0, %1, %3\n" " stlxp %w2, %4, %5, %3" - : "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status), "+Q" (*addr) + : "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status), + "+Q" (*addr) : "r" (value.AO_val1), "r" (value.AO_val2) ); - } while (status); + } while (AO_EXPECT_FALSE(status)); } # define AO_HAVE_double_store_release @@ -108,7 +114,7 @@ int result = 1; do { - __asm__ __volatile__("//AO_double_compare_and_swap\n" + __asm__ __volatile__("@AO_double_compare_and_swap\n" " ldxp %0, %1, [%2]\n" : "=&r" (tmp.AO_val1), "=&r" (tmp.AO_val2) : "r" (addr) @@ -133,7 +139,7 @@ int result = 1; do { - __asm__ __volatile__("//AO_double_compare_and_swap_acquire\n" + __asm__ __volatile__("@AO_double_compare_and_swap_acquire\n" " ldaxp %0, %1, [%2]\n" : "=&r" (tmp.AO_val1), "=&r" (tmp.AO_val2) : "r" (addr) @@ -158,7 +164,7 @@ int result = 1; do { - __asm__ __volatile__("//AO_double_compare_and_swap_release\n" + __asm__ __volatile__("@AO_double_compare_and_swap_release\n" " ldxp %0, %1, [%2]\n" : "=&r" (tmp.AO_val1), "=&r" (tmp.AO_val2) : "r" (addr) |
