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| -rw-r--r-- | configure.ac | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/configure.ac b/configure.ac index 5928de5..4427849 100644 --- a/configure.ac +++ b/configure.ac @@ -69,6 +69,51 @@ AC_SUBST(DEFS) AH_TEMPLATE([_PTHREADS], [Indicates the use of pthreads (NetBSD).]) +AH_TEMPLATE([AO_USE_NANOSLEEP], + [Use nanosleep() instead of select() (only if atomic operations \ + are emulated)]) +AH_TEMPLATE([AO_USE_NO_SIGNALS], + [Do not block signals in compare_and_swap (only if atomic operations \ + are emulated)]) +AH_TEMPLATE([AO_USE_WIN32_PTHREADS], + [Use Win32 Sleep() instead of select() (only if atomic operations \ + are emulated)]) +AH_TEMPLATE([AO_TRACE_MALLOC], [Trace AO_malloc/free calls (for debug only)]) + +# These macros are tested in public headers +AH_TEMPLATE([AO_GENERALIZE_ASM_BOOL_CAS], + [Force compare_and_swap definition via fetch_compare_and_swap]) +AH_TEMPLATE([AO_USE_PTHREAD_DEFS], + [Emulate atomic operations via slow and async-signal-unsafe \ + pthread locking]) +AH_TEMPLATE([AO_ASM_X64_AVAILABLE], + [Inline assembly avalable (only VC/x86_64)]) +AH_TEMPLATE([AO_ASSUME_VISTA], + [Assume Windows Server 2003, Vista or later target (only VC/x86)]) +AH_TEMPLATE([AO_ASSUME_WINDOWS98], + [Assume hardware compare-and-swap functionality available \ + on target (only VC/x86)]) +AH_TEMPLATE([AO_CMPXCHG16B_AVAILABLE], + [Assume target is not old AMD Opteron chip (only x86_64)]) +AH_TEMPLATE([AO_FORCE_USE_SWP], + [Force test_and_set to use SWP instruction instead of LDREX/STREX \ + (only arm v6+)]) +AH_TEMPLATE([AO_NO_SPARC_V9], [Assume target is not sparc v9+ (only sparc)]) +AH_TEMPLATE([AO_OLD_STYLE_INTERLOCKED_COMPARE_EXCHANGE], + [Assume ancient MS VS Win32 headers (only VC/arm v6+, VC/x86)]) +AH_TEMPLATE([AO_UNIPROCESSOR], [Assume single-core target (only arm v6+)]) +AH_TEMPLATE([AO_USE_INTERLOCKED_INTRINSICS], + [Assume Win32 _Interlocked primitives available as intrinsics \ + (only VC/arm)]) +AH_TEMPLATE([AO_USE_PENTIUM4_INSTRS], + [Use Pentium 4 'mfence' instruction (only x86)]) +AH_TEMPLATE([AO_USE_SYNC_CAS_BUILTIN], + [Prefer GCC built-in CAS intrinsics in favor of inline assembly \ + (only gcc/x86, gcc/x86_64)]) +AH_TEMPLATE([AO_WEAK_DOUBLE_CAS_EMULATION], + [Emulate double-width CAS via pthread locking in case of no hardware \ + support (only gcc/x86_64, sunc/x86_64)]) + THREADDLLIBS= have_pthreads=true ## Libraries needed to support threads. |