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| author | Tushar Gohad <tusharsg@gmail.com> | 2016-03-07 07:03:19 +0000 |
|---|---|---|
| committer | Tushar Gohad <tusharsg@gmail.com> | 2016-03-07 07:03:19 +0000 |
| commit | 1785a5894151a8422020516797655be4024dc12b (patch) | |
| tree | 6164971c09746cca101fd344fe6a01b560d533c5 | |
| parent | 96790608c62d927512d2b60e97e19bbb2b860b9f (diff) | |
| download | liberasurecode-1785a5894151a8422020516797655be4024dc12b.tar.gz | |
README.md edited online with Bitbucket
| -rw-r--r-- | README.md | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -12,7 +12,7 @@ Highlights * Pluggable Erasure Code backends - As of v1.1.x, liberasurecode supports the following backends: - - Native, software-only Erasure Coding implementation that supports a Reed-Solomon backend + - 'liberasurecode_rs_vand' - Native, software-only Erasure Coding implementation that supports a Reed-Solomon backend - 'Jerasure' - Erasure Coding library that supports Reed-Solomon, Cauchy backends [1] - 'ISA-L' - Intel Storage Acceleration Library - SIMD accelerated Erasure Coding backends [2] - 'SHSS' - NTT Lab Japan's hybrid Erasure Coding backend [4] @@ -420,4 +420,4 @@ References [3] Greenan, Kevin M et al, "Flat XOR-based erasure codes in storage systems", http://www.kaymgee.com/Kevin_Greenan/Publications_files/greenan-msst10.pdf - [4] Kota Tsuyuzaki <tsuyuzaki.kota@lab.ntt.co.jp>, Ryuta Kon <kon.ryuta@po.ntts.co.jp>, "NTT SHSS Erasure Coding backend" + [4] Kota Tsuyuzaki <tsuyuzaki.kota@lab.ntt.co.jp>, Ryuta Kon <kon.ryuta@po.ntts.co.jp>, "NTT SHSS Erasure Coding backend"
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