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* LICENSES: Add 'sha512-ssse3-i386.c'.
* configure.ac: Add 'sha512-ssse3-i386.lo'.
* cipher/Makefile.am: Add 'sha512-ssse3-i386.c'.
* cipher/sha512-ssse3-i386.c: New.
* cipher/sha512.c (USE_SSSE3_I386, _gcry_sha512_transform_i386_ssse3)
(do_sha512_transform_i386_ssse3): New.
(_gcry_sha512_transform_arm) [USE_SSSE3_I386]: Use i386/SSSE3 transform
function if supported by CPU.
--
Benchmark on AMD Ryzen 7 3700X:
Before:
| nanosecs/byte mebibytes/sec cycles/byte auto Mhz
SHA512 | 12.58 ns/B 75.79 MiB/s 55.06 c/B 4375
After (~4.5x faster):
| nanosecs/byte mebibytes/sec cycles/byte auto Mhz
SHA512 | 2.78 ns/B 343.3 MiB/s 12.09 c/B 4351
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
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* random/rndjent.c: Change license to the one used by jitterentropy.h.
(jent_init_statistic): New.
(jent_bit_count): New.
(jent_statistic_copy_stat): new.
(jent_calc_statistic): New.
--
New code taken from Stephan's jitterentropy-stat.c. This does now
build with CONFIG_CRYPTO_CPU_JITTERENTROPY_STAT defined; not sure
whether this is already useful. Changed the license due to the new
code.
Signed-off-by: Werner Koch <wk@gnupg.org>
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* random/jitterentropy-base-user.h: New.
* random/jitterentropy-base.c: New.
* random/jitterentropy.h: New.
--
Signed-off-by: Werner Koch <wk@gnupg.org>
- Tabs and trailing white spaces removed from original source.
- Source received by mail dated Fri, 27 Jan 2017 17:52:38 +0100 from
Stephan
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--
Add license and copyright statement for cipher/arcfour-amd64.S (public
domain) and cipher/cipher-ocb.c (OCB license 1)
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* LICENSES: Remove 'Simple permissive' and 'IETF permissive' licenses
for 'cipher/crc.c' as result of rewrite of CRC implementations.
--
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
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* LICENSES: Add 'cipher/sha256-avx-amd64.S' and
'cipher/sha256-avx2-bmi2-amd64.S'.
* cipher/Makefile.am: Add 'sha256-avx-amd64.S' and
'sha256-avx2-bmi2-amd64.S'.
* cipher/sha256-avx-amd64.S: New.
* cipher/sha256-avx2-bmi2-amd64.S: New.
* cipher/sha256-ssse3-amd64.S: Use 'lea' instead of 'add' in few
places for tiny speed improvement.
* cipher/sha256.c (USE_AVX, USE_AVX2): New.
(SHA256_CONTEXT) [USE_AVX, USE_AVX2]: Add 'use_avx' and 'use_avx2'.
(sha256_init, sha224_init) [USE_AVX, USE_AVX2]: Initialize above
new context members.
[USE_AVX] (_gcry_sha256_transform_amd64_avx): New.
[USE_AVX2] (_gcry_sha256_transform_amd64_avx2): New.
(transform) [USE_AVX2]: Use AVX2 assembly if enabled.
(transform) [USE_AVX]: Use AVX assembly if enabled.
* configure.ac: Add 'sha256-avx-amd64.lo' and
'sha256-avx2-bmi2-amd64.lo'.
--
Patch adds fast AVX and AVX2/BMI2 implementations of SHA-256 by Intel
Corporation. The assembly source is licensed under 3-clause BSD license,
thus compatible with LGPL2.1+. Original source can be accessed at:
http://www.intel.com/p/en_US/embedded/hwsw/technology/packet-processing#docs
Implementation is described in white paper
"Fast SHA - 256 Implementations on Intel® Architecture Processors"
http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/sha-256-implementations-paper.html
Note: AVX implementation uses SHLD instruction to emulate RORQ, since it's
faster on Intel Sandy-Bridge. However, on non-Intel CPUs SHLD is much
slower than RORQ, so therefore AVX implementation is (for now) limited
to Intel CPUs.
Note: AVX2 implementation also uses BMI2 instruction rorx, thus additional
HWF flag.
Benchmarks:
cpu C-lang SSSE3 AVX/AVX2 C vs AVX/AVX2
vs SSSE3
Intel i5-4570 13.86 c/B 10.27 c/B 8.70 c/B 1.59x 1.18x
Intel i5-2450M 17.25 c/B 12.36 c/B 10.31 c/B 1.67x 1.19x
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
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* LICENSES: New.
* Makefile.am (EXTRA_DIST): Add LICENSES.
* AUTHORS: Add list of copyright holders.
* README: Reference AUTHORS.
Signed-off-by: Werner Koch <wk@gnupg.org>
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