diff options
author | root <root@test-gentoo_x32-1.lan> | 2019-03-04 16:17:50 -0500 |
---|---|---|
committer | Paul Moore <paul@paul-moore.com> | 2019-03-04 16:17:50 -0500 |
commit | f5ff93c6c912e35be9b6cc5c302a5e2e85c33902 (patch) | |
tree | e4016a9a2914286baa6b6236de55d152446fb5d8 | |
parent | 73ccc03f897abe7751ee1a89deb8ce467704b82e (diff) | |
download | libseccomp-f5ff93c6c912e35be9b6cc5c302a5e2e85c33902.tar.gz |
tests: disable a number of tests on the x32 arch
Unfortunately a number of our automated tests fail because of the
x32 syscall bit, making low numbered syscalls invalid.
Signed-off-by: Paul Moore <paul@paul-moore.com>
-rw-r--r-- | tests/01-sim-allow.tests | 4 | ||||
-rw-r--r-- | tests/05-sim-long_jumps.tests | 36 | ||||
-rw-r--r-- | tests/08-sim-subtree_checks.tests | 54 | ||||
-rw-r--r-- | tests/09-sim-syscall_priority_pre.tests | 14 | ||||
-rw-r--r-- | tests/10-sim-syscall_priority_post.tests | 14 | ||||
-rw-r--r-- | tests/12-sim-basic_masked_ops.tests | 58 | ||||
-rw-r--r-- | tests/25-sim-multilevel_chains_adv.tests | 12 | ||||
-rw-r--r-- | tests/27-sim-bpf_blk_state.tests | 10 | ||||
-rw-r--r-- | tests/40-sim-log.tests | 4 | ||||
-rw-r--r-- | tests/42-sim-adv_chains.tests | 70 | ||||
-rw-r--r-- | tests/45-sim-chain_code_coverage.tests | 14 |
11 files changed, 145 insertions, 145 deletions
diff --git a/tests/01-sim-allow.tests b/tests/01-sim-allow.tests index 9630276..bfdc470 100644 --- a/tests/01-sim-allow.tests +++ b/tests/01-sim-allow.tests @@ -7,8 +7,8 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -01-sim-allow all 0-350 N N N N N N ALLOW +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +01-sim-allow all,-x32 0-350 N N N N N N ALLOW test type: bpf-sim-fuzz diff --git a/tests/05-sim-long_jumps.tests b/tests/05-sim-long_jumps.tests index 03eb6d9..ea1fc52 100644 --- a/tests/05-sim-long_jumps.tests +++ b/tests/05-sim-long_jumps.tests @@ -7,24 +7,24 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -05-sim-long_jumps all 1 1 2 3 4 5 6 ALLOW -05-sim-long_jumps all 2 N N N N N N KILL -05-sim-long_jumps all 999 N N N N N N KILL -05-sim-long_jumps x86 1000 0-5 0x856B008 0x7FFFFFFE N N N ALLOW -05-sim-long_jumps x86_64 1000 0-5 0x856B008 0x7FFFFFFFFFFFFFFE N N N ALLOW -05-sim-long_jumps x86 1000 95-99 0x856B008 0x7FFFFFFE N N N ALLOW -05-sim-long_jumps x86_64 1000 95-99 0x856B008 0x7FFFFFFFFFFFFFFE N N N ALLOW -05-sim-long_jumps x86 1000 100 0x856B008 0x7FFFFFFE N N N KILL -05-sim-long_jumps x86_64 1000 100 0x856B008 0x7FFFFFFFFFFFFFFE N N N KILL -05-sim-long_jumps all 1001 N N N N N N KILL -05-sim-long_jumps all 99 1 N N N N N KILL -05-sim-long_jumps all 100-105 1 N N N N N ALLOW -05-sim-long_jumps all 195-199 1 N N N N N ALLOW -05-sim-long_jumps all 200 1 N N N N N KILL -05-sim-long_jumps all 3 N N N N N N KILL -05-sim-long_jumps all 4 1 2 3 4 5 6 ALLOW -05-sim-long_jumps all 5 N N N N N N KILL +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +05-sim-long_jumps all,-x32 1 1 2 3 4 5 6 ALLOW +05-sim-long_jumps all,-x32 2 N N N N N N KILL +05-sim-long_jumps all,-x32 999 N N N N N N KILL +05-sim-long_jumps x86 1000 0-5 0x856B008 0x7FFFFFFE N N N ALLOW +05-sim-long_jumps x86_64 1000 0-5 0x856B008 0x7FFFFFFFFFFFFFFE N N N ALLOW +05-sim-long_jumps x86 1000 95-99 0x856B008 0x7FFFFFFE N N N ALLOW +05-sim-long_jumps x86_64 1000 95-99 0x856B008 0x7FFFFFFFFFFFFFFE N N N ALLOW +05-sim-long_jumps x86 1000 100 0x856B008 0x7FFFFFFE N N N KILL +05-sim-long_jumps x86_64 1000 100 0x856B008 0x7FFFFFFFFFFFFFFE N N N KILL +05-sim-long_jumps all,-x32 1001 N N N N N N KILL +05-sim-long_jumps all,-x32 99 1 N N N N N KILL +05-sim-long_jumps all,-x32 100-105 1 N N N N N ALLOW +05-sim-long_jumps all,-x32 195-199 1 N N N N N ALLOW +05-sim-long_jumps all,-x32 200 1 N N N N N KILL +05-sim-long_jumps all,-x32 3 N N N N N N KILL +05-sim-long_jumps all,-x32 4 1 2 3 4 5 6 ALLOW +05-sim-long_jumps all,-x32 5 N N N N N N KILL test type: bpf-sim-fuzz diff --git a/tests/08-sim-subtree_checks.tests b/tests/08-sim-subtree_checks.tests index 0db5336..6c29c21 100644 --- a/tests/08-sim-subtree_checks.tests +++ b/tests/08-sim-subtree_checks.tests @@ -7,33 +7,33 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -08-sim-subtree_checks all 1000 0-10 1 N N N N ALLOW -08-sim-subtree_checks all 1000 0-10 0 N N N N KILL -08-sim-subtree_checks all 1001 0-10 1 N N N N ALLOW -08-sim-subtree_checks all 1001 0-10 0 N N N N KILL -08-sim-subtree_checks all 1002 0-5 1 2 0-5 N N ALLOW -08-sim-subtree_checks all 1002 0-5 2 1 0-5 N N KILL -08-sim-subtree_checks all 1003 0-5 1 2 0-5 N N ALLOW -08-sim-subtree_checks all 1003 0-5 2 1 0-5 N N KILL -08-sim-subtree_checks all 1004 0 11 5-10 10 10 1-5 ALLOW -08-sim-subtree_checks all 1004 0 1 2 0-5 N N ALLOW -08-sim-subtree_checks all 1004 1-5 1 2 0-5 N N ALLOW -08-sim-subtree_checks all 1004 1-5 1 2 30-35 N N ALLOW -08-sim-subtree_checks all 1004 1-5 2 1 30-35 N N KILL -08-sim-subtree_checks all 1005 0 11 5-10 10 10 1-5 ALLOW -08-sim-subtree_checks all 1005 0 1 2 0-5 N N ALLOW -08-sim-subtree_checks all 1005 1-5 1 2 0-5 N N ALLOW -08-sim-subtree_checks all 1005 1-5 1 2 30-35 N N ALLOW -08-sim-subtree_checks all 1005 1-5 2 1 30-35 N N KILL -08-sim-subtree_checks all 1006 0-10 1 2 N N N ALLOW -08-sim-subtree_checks all 1006 0-10 1 3 N N N KILL -08-sim-subtree_checks all 1006 10 2-100 2 N N N ALLOW -08-sim-subtree_checks all 1007 0 0 2 3 N N TRAP -08-sim-subtree_checks all 1007 1 1 1 0-2 1 1 ALLOW -08-sim-subtree_checks all 1007 1 1 2 0-2 1 1 ALLOW -08-sim-subtree_checks all 1007 1 1 2 4-6 1 1 ALLOW -08-sim-subtree_checks all 1007 1 1 0 3 1 1 KILL +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +08-sim-subtree_checks all,-x32 1000 0-10 1 N N N N ALLOW +08-sim-subtree_checks all,-x32 1000 0-10 0 N N N N KILL +08-sim-subtree_checks all,-x32 1001 0-10 1 N N N N ALLOW +08-sim-subtree_checks all,-x32 1001 0-10 0 N N N N KILL +08-sim-subtree_checks all,-x32 1002 0-5 1 2 0-5 N N ALLOW +08-sim-subtree_checks all,-x32 1002 0-5 2 1 0-5 N N KILL +08-sim-subtree_checks all,-x32 1003 0-5 1 2 0-5 N N ALLOW +08-sim-subtree_checks all,-x32 1003 0-5 2 1 0-5 N N KILL +08-sim-subtree_checks all,-x32 1004 0 11 5-10 10 10 1-5 ALLOW +08-sim-subtree_checks all,-x32 1004 0 1 2 0-5 N N ALLOW +08-sim-subtree_checks all,-x32 1004 1-5 1 2 0-5 N N ALLOW +08-sim-subtree_checks all,-x32 1004 1-5 1 2 30-35 N N ALLOW +08-sim-subtree_checks all,-x32 1004 1-5 2 1 30-35 N N KILL +08-sim-subtree_checks all,-x32 1005 0 11 5-10 10 10 1-5 ALLOW +08-sim-subtree_checks all,-x32 1005 0 1 2 0-5 N N ALLOW +08-sim-subtree_checks all,-x32 1005 1-5 1 2 0-5 N N ALLOW +08-sim-subtree_checks all,-x32 1005 1-5 1 2 30-35 N N ALLOW +08-sim-subtree_checks all,-x32 1005 1-5 2 1 30-35 N N KILL +08-sim-subtree_checks all,-x32 1006 0-10 1 2 N N N ALLOW +08-sim-subtree_checks all,-x32 1006 0-10 1 3 N N N KILL +08-sim-subtree_checks all,-x32 1006 10 2-100 2 N N N ALLOW +08-sim-subtree_checks all,-x32 1007 0 0 2 3 N N TRAP +08-sim-subtree_checks all,-x32 1007 1 1 1 0-2 1 1 ALLOW +08-sim-subtree_checks all,-x32 1007 1 1 2 0-2 1 1 ALLOW +08-sim-subtree_checks all,-x32 1007 1 1 2 4-6 1 1 ALLOW +08-sim-subtree_checks all,-x32 1007 1 1 0 3 1 1 KILL test type: bpf-sim-fuzz diff --git a/tests/09-sim-syscall_priority_pre.tests b/tests/09-sim-syscall_priority_pre.tests index 7b7d53f..a983967 100644 --- a/tests/09-sim-syscall_priority_pre.tests +++ b/tests/09-sim-syscall_priority_pre.tests @@ -7,13 +7,13 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -09-sim-syscall_priority_pre all 999 N N N N N N KILL -09-sim-syscall_priority_pre all 1000-1002 0 1 N N N N ALLOW -09-sim-syscall_priority_pre all 1000 0 2 N N N N KILL -09-sim-syscall_priority_pre all 1001-1002 0 2 N N N N ALLOW -09-sim-syscall_priority_pre all 1000-1001 1 1 N N N N KILL -09-sim-syscall_priority_pre all 1003 N N N N N N KILL +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +09-sim-syscall_priority_pre all,-x32 999 N N N N N N KILL +09-sim-syscall_priority_pre all,-x32 1000-1002 0 1 N N N N ALLOW +09-sim-syscall_priority_pre all,-x32 1000 0 2 N N N N KILL +09-sim-syscall_priority_pre all,-x32 1001-1002 0 2 N N N N ALLOW +09-sim-syscall_priority_pre all,-x32 1000-1001 1 1 N N N N KILL +09-sim-syscall_priority_pre all,-x32 1003 N N N N N N KILL test type: bpf-sim-fuzz diff --git a/tests/10-sim-syscall_priority_post.tests b/tests/10-sim-syscall_priority_post.tests index aa0389f..b05235c 100644 --- a/tests/10-sim-syscall_priority_post.tests +++ b/tests/10-sim-syscall_priority_post.tests @@ -7,13 +7,13 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -10-sim-syscall_priority_post all 999 N N N N N N KILL -10-sim-syscall_priority_post all 1000-1002 0 1 N N N N ALLOW -10-sim-syscall_priority_post all 1000 0 2 N N N N KILL -10-sim-syscall_priority_post all 1001-1002 0 2 N N N N ALLOW -10-sim-syscall_priority_post all 1000-1001 1 1 N N N N KILL -10-sim-syscall_priority_post all 1003 N N N N N N KILL +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +10-sim-syscall_priority_post all,-x32 999 N N N N N N KILL +10-sim-syscall_priority_post all,-x32 1000-1002 0 1 N N N N ALLOW +10-sim-syscall_priority_post all,-x32 1000 0 2 N N N N KILL +10-sim-syscall_priority_post all,-x32 1001-1002 0 2 N N N N ALLOW +10-sim-syscall_priority_post all,-x32 1000-1001 1 1 N N N N KILL +10-sim-syscall_priority_post all,-x32 1003 N N N N N N KILL test type: bpf-sim-fuzz diff --git a/tests/12-sim-basic_masked_ops.tests b/tests/12-sim-basic_masked_ops.tests index 5f1327f..5a722f8 100644 --- a/tests/12-sim-basic_masked_ops.tests +++ b/tests/12-sim-basic_masked_ops.tests @@ -7,35 +7,35 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -12-sim-basic_masked_ops all 1000 0 1 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x01 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x02-0x0A 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x101 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 11 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x0B 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x0C-0x6E 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x1000B 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 111 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x6F 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x70-0x100 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x102-0x200 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x10002-0x1000A 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x1000C-0x1006E 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x1006F 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 1000 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x3E8 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x2FF 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x300-0x3FF 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x400 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x402-0x4FF 2 N N N KILL -12-sim-basic_masked_ops all 1000 0 0x10300-0x103FF 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x00000000F00003E8 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x00000000800003E8 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x00000001800003E8 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x00000001000003E8 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0x0000000F000003E8 2 N N N ALLOW -12-sim-basic_masked_ops all 1000 0 0xFFFFFFFFFFFF03E8 2 N N N ALLOW +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +12-sim-basic_masked_ops all,-x32 1000 0 1 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x01 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x02-0x0A 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x101 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 11 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x0B 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x0C-0x6E 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x1000B 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 111 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x6F 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x70-0x100 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x102-0x200 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x10002-0x1000A 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x1000C-0x1006E 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x1006F 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 1000 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x3E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x2FF 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x300-0x3FF 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x400 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x402-0x4FF 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x10300-0x103FF 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000000F00003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000000800003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000001800003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000001000003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x0000000F000003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0xFFFFFFFFFFFF03E8 2 N N N ALLOW test type: bpf-sim-fuzz diff --git a/tests/25-sim-multilevel_chains_adv.tests b/tests/25-sim-multilevel_chains_adv.tests index 8b0e202..c090a2e 100644 --- a/tests/25-sim-multilevel_chains_adv.tests +++ b/tests/25-sim-multilevel_chains_adv.tests @@ -8,16 +8,16 @@ test type: bpf-sim # Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -25-sim-multilevel_chains_adv all 0-9 N N N N N N KILL -25-sim-multilevel_chains_adv all 10 0x0000000b 0x00000000 N N N N ALLOW +25-sim-multilevel_chains_adv all,-x32 0-9 N N N N N N KILL +25-sim-multilevel_chains_adv all,-x32 10 0x0000000b 0x00000000 N N N N ALLOW 25-sim-multilevel_chains_adv x86_64 10 0x10000000b 0x00000000 N N N N KILL 25-sim-multilevel_chains_adv x86_64 10 0x0000000b 0x10000000c N N N N ALLOW -25-sim-multilevel_chains_adv all 11-19 N N N N N N KILL -25-sim-multilevel_chains_adv all 20 0x00000015 0x00000000 0x00000017 N N N ALLOW -25-sim-multilevel_chains_adv all 20 0x00000015 0x00000016 0x00000017 N N N KILL +25-sim-multilevel_chains_adv all,-x32 11-19 N N N N N N KILL +25-sim-multilevel_chains_adv all,-x32 20 0x00000015 0x00000000 0x00000017 N N N ALLOW +25-sim-multilevel_chains_adv all,-x32 20 0x00000015 0x00000016 0x00000017 N N N KILL 25-sim-multilevel_chains_adv x86_64 20 0x100000015 0x00000000 0x00000017 N N N KILL 25-sim-multilevel_chains_adv x86_64 20 0x00000015 0x00000000 0x100000017 N N N KILL -25-sim-multilevel_chains_adv all 21-30 N N N N N N KILL +25-sim-multilevel_chains_adv all,-x32 21-30 N N N N N N KILL test type: bpf-sim-fuzz diff --git a/tests/27-sim-bpf_blk_state.tests b/tests/27-sim-bpf_blk_state.tests index a9c0fa4..cd1da6e 100644 --- a/tests/27-sim-bpf_blk_state.tests +++ b/tests/27-sim-bpf_blk_state.tests @@ -7,11 +7,11 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -27-sim-bpf_blk_state all 1000 0-2 N N N N N ALLOW -27-sim-bpf_blk_state all 1000 3-9 N N N N N KILL -27-sim-bpf_blk_state all 1000 10 N N N N N ALLOW -27-sim-bpf_blk_state all 1000 11-32 N N N N N KILL +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +27-sim-bpf_blk_state all,-x32 1000 0-2 N N N N N ALLOW +27-sim-bpf_blk_state all,-x32 1000 3-9 N N N N N KILL +27-sim-bpf_blk_state all,-x32 1000 10 N N N N N ALLOW +27-sim-bpf_blk_state all,-x32 1000 11-32 N N N N N KILL test type: bpf-sim-fuzz diff --git a/tests/40-sim-log.tests b/tests/40-sim-log.tests index 8fd5510..5a036e8 100644 --- a/tests/40-sim-log.tests +++ b/tests/40-sim-log.tests @@ -7,8 +7,8 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -40-sim-log all 0-350 N N N N N N LOG +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +40-sim-log all,-x32 0-350 N N N N N N LOG test type: bpf-sim-fuzz diff --git a/tests/42-sim-adv_chains.tests b/tests/42-sim-adv_chains.tests index ab36213..600ad09 100644 --- a/tests/42-sim-adv_chains.tests +++ b/tests/42-sim-adv_chains.tests @@ -7,41 +7,41 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -42-sim-adv_chains all 1000 N N N N N N KILL -42-sim-adv_chains all 1001 N N N N N N ALLOW -42-sim-adv_chains all 1002 1 N N N N N ALLOW -42-sim-adv_chains all 1003 N N N N N N ALLOW -42-sim-adv_chains all 1003 1 N N N N N TRAP -42-sim-adv_chains all 1003 2 N N N N N ALLOW -42-sim-adv_chains all 1004 N N N N N N TRAP -42-sim-adv_chains all 1004 1 N N N N N ALLOW -42-sim-adv_chains all 1004 2 N N N N N TRAP -42-sim-adv_chains all 1005 N N N N N N ALLOW -42-sim-adv_chains all 1005 1 N N N N N ALLOW -42-sim-adv_chains all 1005 2 N N N N N ALLOW -42-sim-adv_chains all 1006 1 N N N N N ALLOW -42-sim-adv_chains all 1007 1 N N N N N ALLOW -42-sim-adv_chains all 1008 2 3 N N N N ALLOW -42-sim-adv_chains all 1008 2 3 3 N N N ALLOW -42-sim-adv_chains all 1008 2 3 4 N N N ALLOW -42-sim-adv_chains all 1009 N N N N N N ALLOW -42-sim-adv_chains all 1009 2 N N N N N ALLOW -42-sim-adv_chains all 1009 1 3 N N N N ALLOW -42-sim-adv_chains all 1010 N N N N N N KILL -42-sim-adv_chains all 1010 1 N N N N N ALLOW -42-sim-adv_chains all 1010 2 2 N N N N ALLOW -42-sim-adv_chains all 1011 1 N N N N N ALLOW -42-sim-adv_chains all 1011 2 4 1 N N N ALLOW -42-sim-adv_chains all 1012 8 N N N N N ALLOW -42-sim-adv_chains all 1013 2 3 N N N N ALLOW -42-sim-adv_chains all 1013 0 4 N N N N ALLOW -42-sim-adv_chains all 1014 0 0 2 3 N N ALLOW -42-sim-adv_chains all 1014 2 3 1 2 N N ALLOW -42-sim-adv_chains all 1015 1 N N N N N KILL -42-sim-adv_chains all 1015 4 N N N N N ALLOW -42-sim-adv_chains all 1015 4 1 N N N N ALLOW -42-sim-adv_chains all 1015 4 2 N N N N ALLOW +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +42-sim-adv_chains all,-x32 1000 N N N N N N KILL +42-sim-adv_chains all,-x32 1001 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1002 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1003 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1003 1 N N N N N TRAP +42-sim-adv_chains all,-x32 1003 2 N N N N N ALLOW +42-sim-adv_chains all,-x32 1004 N N N N N N TRAP +42-sim-adv_chains all,-x32 1004 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1004 2 N N N N N TRAP +42-sim-adv_chains all,-x32 1005 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1005 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1005 2 N N N N N ALLOW +42-sim-adv_chains all,-x32 1006 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1007 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1008 2 3 N N N N ALLOW +42-sim-adv_chains all,-x32 1008 2 3 3 N N N ALLOW +42-sim-adv_chains all,-x32 1008 2 3 4 N N N ALLOW +42-sim-adv_chains all,-x32 1009 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1009 2 N N N N N ALLOW +42-sim-adv_chains all,-x32 1009 1 3 N N N N ALLOW +42-sim-adv_chains all,-x32 1010 N N N N N N KILL +42-sim-adv_chains all,-x32 1010 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1010 2 2 N N N N ALLOW +42-sim-adv_chains all,-x32 1011 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1011 2 4 1 N N N ALLOW +42-sim-adv_chains all,-x32 1012 8 N N N N N ALLOW +42-sim-adv_chains all,-x32 1013 2 3 N N N N ALLOW +42-sim-adv_chains all,-x32 1013 0 4 N N N N ALLOW +42-sim-adv_chains all,-x32 1014 0 0 2 3 N N ALLOW +42-sim-adv_chains all,-x32 1014 2 3 1 2 N N ALLOW +42-sim-adv_chains all,-x32 1015 1 N N N N N KILL +42-sim-adv_chains all,-x32 1015 4 N N N N N ALLOW +42-sim-adv_chains all,-x32 1015 4 1 N N N N ALLOW +42-sim-adv_chains all,-x32 1015 4 2 N N N N ALLOW test type: bpf-sim-fuzz diff --git a/tests/45-sim-chain_code_coverage.tests b/tests/45-sim-chain_code_coverage.tests index 482f6e9..c013912 100644 --- a/tests/45-sim-chain_code_coverage.tests +++ b/tests/45-sim-chain_code_coverage.tests @@ -7,10 +7,10 @@ test type: bpf-sim -# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result -45-sim-chain_code_coverage all 1008 1 1 1 1 1 1 ALLOW -45-sim-chain_code_coverage all 1008 1 2 1 1 1 1 ALLOW -45-sim-chain_code_coverage all 1008 4 1 1 1 1 1 ALLOW -45-sim-chain_code_coverage all 1008 1 1 0x14 1 1 1 ALLOW -45-sim-chain_code_coverage all 1008 4 1 0x15 1 1 1 ALLOW -45-sim-chain_code_coverage all 1008 4 1 0x106 1 1 1 ALLOW +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +45-sim-chain_code_coverage all,-x32 1008 1 1 1 1 1 1 ALLOW +45-sim-chain_code_coverage all,-x32 1008 1 2 1 1 1 1 ALLOW +45-sim-chain_code_coverage all,-x32 1008 4 1 1 1 1 1 ALLOW +45-sim-chain_code_coverage all,-x32 1008 1 1 0x14 1 1 1 ALLOW +45-sim-chain_code_coverage all,-x32 1008 4 1 0x15 1 1 1 ALLOW +45-sim-chain_code_coverage all,-x32 1008 4 1 0x106 1 1 1 ALLOW |