index
:
delta/libseccomp.git
coverity-scan
main
master
release-0.1
release-1.0
release-2.0
release-2.1
release-2.2
release-2.3
release-2.4
release-2.5
working-api_level
working-pcmoore
github.com: seccomp/libseccomp.git
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
tests
Mode
Name
Size
-rw-r--r--
.gitignore
465
log
plain
-rw-r--r--
01-sim-allow.c
1156
log
plain
-rwxr-xr-x
01-sim-allow.py
1044
log
plain
-rw-r--r--
01-sim-allow.tests
317
log
plain
-rw-r--r--
02-sim-basic.c
1658
log
plain
-rwxr-xr-x
02-sim-basic.py
1209
log
plain
-rw-r--r--
02-sim-basic.tests
746
log
plain
-rw-r--r--
03-sim-basic_chains.c
1793
log
plain
-rwxr-xr-x
03-sim-basic_chains.py
1347
log
plain
-rw-r--r--
03-sim-basic_chains.tests
948
log
plain
-rw-r--r--
04-sim-multilevel_chains.c
2235
log
plain
-rwxr-xr-x
04-sim-multilevel_chains.py
1762
log
plain
-rw-r--r--
04-sim-multilevel_chains.tests
1829
log
plain
-rw-r--r--
05-sim-long_jumps.c
1903
log
plain
-rwxr-xr-x
05-sim-long_jumps.py
1516
log
plain
-rw-r--r--
05-sim-long_jumps.tests
1218
log
plain
-rw-r--r--
06-sim-actions.c
1592
log
plain
-rwxr-xr-x
06-sim-actions.py
1196
log
plain
-rw-r--r--
06-sim-actions.tests
621
log
plain
-rw-r--r--
07-sim-db_bug_looping.c
1672
log
plain
-rwxr-xr-x
07-sim-db_bug_looping.py
1320
log
plain
-rw-r--r--
07-sim-db_bug_looping.tests
458
log
plain
-rw-r--r--
08-sim-subtree_checks.c
4857
log
plain
-rwxr-xr-x
08-sim-subtree_checks.py
3898
log
plain
-rw-r--r--
08-sim-subtree_checks.tests
1649
log
plain
-rw-r--r--
09-sim-syscall_priority_pre.c
1813
log
plain
-rwxr-xr-x
09-sim-syscall_priority_pre.py
1369
log
plain
-rw-r--r--
09-sim-syscall_priority_pre.tests
639
log
plain
-rw-r--r--
10-sim-syscall_priority_post.c
1813
log
plain
-rwxr-xr-x
10-sim-syscall_priority_post.py
1369
log
plain
-rw-r--r--
10-sim-syscall_priority_post.tests
646
log
plain
-rw-r--r--
11-basic-basic_errors.c
4085
log
plain
-rwxr-xr-x
11-basic-basic_errors.py
2137
log
plain
-rw-r--r--
11-basic-basic_errors.tests
185
log
plain
-rw-r--r--
12-sim-basic_masked_ops.c
2234
log
plain
-rwxr-xr-x
12-sim-basic_masked_ops.py
1936
log
plain
-rw-r--r--
12-sim-basic_masked_ops.tests
1556
log
plain
-rw-r--r--
13-basic-attrs.c
1757
log
plain
-rwxr-xr-x
13-basic-attrs.py
1440
log
plain
-rw-r--r--
13-basic-attrs.tests
178
log
plain
-rw-r--r--
14-sim-reset.c
1419
log
plain
-rwxr-xr-x
14-sim-reset.py
1118
log
plain
-rw-r--r--
14-sim-reset.tests
705
log
plain
-rw-r--r--
15-basic-resolver.c
1773
log
plain
-rwxr-xr-x
15-basic-resolver.py
1580
log
plain
-rw-r--r--
15-basic-resolver.tests
193
log
plain
-rw-r--r--
16-sim-arch_basic.c
2213
log
plain
-rwxr-xr-x
16-sim-arch_basic.py
1476
log
plain
-rw-r--r--
16-sim-arch_basic.tests
959
log
plain
-rw-r--r--
17-sim-arch_merge.c
2751
log
plain
-rwxr-xr-x
17-sim-arch_merge.py
1619
log
plain
-rw-r--r--
17-sim-arch_merge.tests
803
log
plain
-rw-r--r--
18-sim-basic_whitelist.c
1789
log
plain
-rwxr-xr-x
18-sim-basic_whitelist.py
1343
log
plain
-rw-r--r--
18-sim-basic_whitelist.tests
1003
log
plain
-rw-r--r--
19-sim-missing_syscalls.c
1574
log
plain
-rwxr-xr-x
19-sim-missing_syscalls.py
1270
log
plain
-rw-r--r--
19-sim-missing_syscalls.tests
355
log
plain
-rw-r--r--
20-live-basic_die.c
1526
log
plain
-rwxr-xr-x
20-live-basic_die.py
1273
log
plain
-rw-r--r--
20-live-basic_die.tests
247
log
plain
-rw-r--r--
21-live-basic_allow.c
1785
log
plain
-rwxr-xr-x
21-live-basic_allow.py
1695
log
plain
-rw-r--r--
21-live-basic_allow.tests
203
log
plain
-rw-r--r--
22-sim-basic_chains_array.c
1916
log
plain
-rwxr-xr-x
22-sim-basic_chains_array.py
1493
log
plain
-rw-r--r--
22-sim-basic_chains_array.tests
994
log
plain
-rw-r--r--
Makefile
1748
log
plain
-rwxr-xr-x
regression
22677
log
plain
-rw-r--r--
util.c
4750
log
plain
-rw-r--r--
util.h
1114
log
plain
-rw-r--r--
util.py
3046
log
plain