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-rw-r--r--.gitignore465logplain
-rw-r--r--01-sim-allow.c1156logplain
-rwxr-xr-x01-sim-allow.py1044logplain
-rw-r--r--01-sim-allow.tests317logplain
-rw-r--r--02-sim-basic.c1658logplain
-rwxr-xr-x02-sim-basic.py1209logplain
-rw-r--r--02-sim-basic.tests746logplain
-rw-r--r--03-sim-basic_chains.c1793logplain
-rwxr-xr-x03-sim-basic_chains.py1347logplain
-rw-r--r--03-sim-basic_chains.tests948logplain
-rw-r--r--04-sim-multilevel_chains.c2235logplain
-rwxr-xr-x04-sim-multilevel_chains.py1762logplain
-rw-r--r--04-sim-multilevel_chains.tests1829logplain
-rw-r--r--05-sim-long_jumps.c1903logplain
-rwxr-xr-x05-sim-long_jumps.py1516logplain
-rw-r--r--05-sim-long_jumps.tests1218logplain
-rw-r--r--06-sim-actions.c1592logplain
-rwxr-xr-x06-sim-actions.py1196logplain
-rw-r--r--06-sim-actions.tests621logplain
-rw-r--r--07-sim-db_bug_looping.c1672logplain
-rwxr-xr-x07-sim-db_bug_looping.py1320logplain
-rw-r--r--07-sim-db_bug_looping.tests458logplain
-rw-r--r--08-sim-subtree_checks.c4857logplain
-rwxr-xr-x08-sim-subtree_checks.py3898logplain
-rw-r--r--08-sim-subtree_checks.tests1649logplain
-rw-r--r--09-sim-syscall_priority_pre.c1813logplain
-rwxr-xr-x09-sim-syscall_priority_pre.py1369logplain
-rw-r--r--09-sim-syscall_priority_pre.tests639logplain
-rw-r--r--10-sim-syscall_priority_post.c1813logplain
-rwxr-xr-x10-sim-syscall_priority_post.py1369logplain
-rw-r--r--10-sim-syscall_priority_post.tests646logplain
-rw-r--r--11-basic-basic_errors.c4085logplain
-rwxr-xr-x11-basic-basic_errors.py2137logplain
-rw-r--r--11-basic-basic_errors.tests185logplain
-rw-r--r--12-sim-basic_masked_ops.c2234logplain
-rwxr-xr-x12-sim-basic_masked_ops.py1936logplain
-rw-r--r--12-sim-basic_masked_ops.tests1556logplain
-rw-r--r--13-basic-attrs.c1757logplain
-rwxr-xr-x13-basic-attrs.py1440logplain
-rw-r--r--13-basic-attrs.tests178logplain
-rw-r--r--14-sim-reset.c1419logplain
-rwxr-xr-x14-sim-reset.py1118logplain
-rw-r--r--14-sim-reset.tests705logplain
-rw-r--r--15-basic-resolver.c1773logplain
-rwxr-xr-x15-basic-resolver.py1580logplain
-rw-r--r--15-basic-resolver.tests193logplain
-rw-r--r--16-sim-arch_basic.c2213logplain
-rwxr-xr-x16-sim-arch_basic.py1476logplain
-rw-r--r--16-sim-arch_basic.tests959logplain
-rw-r--r--17-sim-arch_merge.c2751logplain
-rwxr-xr-x17-sim-arch_merge.py1619logplain
-rw-r--r--17-sim-arch_merge.tests803logplain
-rw-r--r--18-sim-basic_whitelist.c1789logplain
-rwxr-xr-x18-sim-basic_whitelist.py1343logplain
-rw-r--r--18-sim-basic_whitelist.tests1003logplain
-rw-r--r--19-sim-missing_syscalls.c1574logplain
-rwxr-xr-x19-sim-missing_syscalls.py1270logplain
-rw-r--r--19-sim-missing_syscalls.tests355logplain
-rw-r--r--20-live-basic_die.c1526logplain
-rwxr-xr-x20-live-basic_die.py1273logplain
-rw-r--r--20-live-basic_die.tests247logplain
-rw-r--r--21-live-basic_allow.c1785logplain
-rwxr-xr-x21-live-basic_allow.py1695logplain
-rw-r--r--21-live-basic_allow.tests203logplain
-rw-r--r--22-sim-basic_chains_array.c1916logplain
-rwxr-xr-x22-sim-basic_chains_array.py1493logplain
-rw-r--r--22-sim-basic_chains_array.tests994logplain
-rw-r--r--Makefile1748logplain
-rwxr-xr-xregression22677logplain
-rw-r--r--util.c4750logplain
-rw-r--r--util.h1114logplain
-rw-r--r--util.py3046logplain