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| author | Haihao Xiang <haihao.xiang@intel.com> | 2018-03-15 14:56:44 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2018-03-15 16:49:49 +0800 |
| commit | 99c3748cc428b337a5f78b5cd2751c9c41b21b73 (patch) | |
| tree | e6037ae6ec989f53350bccdaf4de5d8354dc1cb5 | |
| parent | d8c73243cf7680be01bba1017d1e760c0049bffa (diff) | |
| download | libva-intel-driver-99c3748cc428b337a5f78b5cd2751c9c41b21b73.tar.gz | |
Set the right height for VP9 encoding
Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
| -rw-r--r-- | src/gen9_vp9_encoder.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gen9_vp9_encoder.c b/src/gen9_vp9_encoder.c index f44f8abe..8aeeb9e4 100644 --- a/src/gen9_vp9_encoder.c +++ b/src/gen9_vp9_encoder.c @@ -2730,7 +2730,7 @@ gen9_vp9_run_dys_refframes(VADriverContextP ctx, if (vp9_state->hme_enabled) { dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 4), 16); - dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_height / 4), 16); + dys_kernel_param.input_height = ALIGN((vp9_priv_surface->frame_height / 4), 16); dys_kernel_param.input_surface = vp9_priv_surface->scaled_4x_surface_obj; dys_kernel_param.output_width = vp9_state->frame_width_4x; @@ -2783,7 +2783,7 @@ gen9_vp9_run_dys_refframes(VADriverContextP ctx, if (vp9_state->hme_enabled) { dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 4), 16); - dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_height / 4), 16); + dys_kernel_param.input_height = ALIGN((vp9_priv_surface->frame_height / 4), 16); dys_kernel_param.input_surface = vp9_priv_surface->scaled_4x_surface_obj; dys_kernel_param.output_width = vp9_state->frame_width_4x; |