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| author | Sreerenj Balachandran <sreerenj.balachandran@intel.com> | 2015-10-12 11:38:00 +0300 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2015-10-13 14:38:57 +0800 |
| commit | 4618ce1a0ad9542576d03cf3c5cbf17fcc1ef0bf (patch) | |
| tree | 54608701938985211ca324dc15fe417115ba72f7 | |
| parent | 4c02bf3f9db6c753f71ba78d6a9a8d9e1796dd98 (diff) | |
| download | libva-intel-driver-4618ce1a0ad9542576d03cf3c5cbf17fcc1ef0bf.tar.gz | |
vpp/gen9: Use 48 bit address relocation for STATE_BASE_ADDRESS
Use 48 bit address relocation for Surface state address, Dynamic state address
and Instruction base address.
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
| -rw-r--r-- | src/gen9_post_processing.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/src/gen9_post_processing.c b/src/gen9_post_processing.c index a60c70bc..46a156fa 100644 --- a/src/gen9_post_processing.c +++ b/src/gen9_post_processing.c @@ -348,21 +348,18 @@ gen9_pp_state_base_address(VADriverContextP ctx, OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); OUT_BATCH(batch, 0); OUT_BATCH(batch, 0); - /* DW4. Surface state address */ - OUT_RELOC(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ - OUT_BATCH(batch, 0); - /* DW6. Dynamic state address */ - OUT_RELOC(batch, pp_context->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, + /* DW4-5 Surface state address */ + OUT_RELOC64(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + /* DW6-7 Dynamic state address */ + OUT_RELOC64(batch, pp_context->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, 0, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0); /* DW8. Indirect object address */ OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); OUT_BATCH(batch, 0); - /* DW10. Instruction base address */ - OUT_RELOC(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0); + /* DW10-11 Instruction base address */ + OUT_RELOC64(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); |