diff options
| author | carpalis <jerome.borsboom@carpalis.nl> | 2018-03-29 09:37:44 +0200 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2018-04-20 16:22:52 +0800 |
| commit | 459e947afb81c49160d94b5a4558075f28d0761f (patch) | |
| tree | 1c5cf32138b7cfd4bd21460048dd84510425f62a | |
| parent | 99c3748cc428b337a5f78b5cd2751c9c41b21b73 (diff) | |
| download | libva-intel-driver-459e947afb81c49160d94b5a4558075f28d0761f.tar.gz | |
genX_mfd: ignore FASTUVMC for interlace frame P and B pictures
Interlace frame P and B pictures should ignore the FASTUVMC syntax element, as
stated in section 10.7.3.7 of VC-1 spec. Furthermore, prevent using the MVMODE
syntax element for interlace frame P and B pictures, as these picture types do
not include MVMODE or MVMODE2.
Signed-off-by: Jerome Borsboom <jerome.borsboom@carpalis.nl>
| -rw-r--r-- | src/gen75_mfd.c | 17 | ||||
| -rw-r--r-- | src/gen7_mfd.c | 17 | ||||
| -rw-r--r-- | src/gen8_mfd.c | 17 |
3 files changed, 33 insertions, 18 deletions
diff --git a/src/gen75_mfd.c b/src/gen75_mfd.c index aa3aa4c4..bd461a85 100644 --- a/src/gen75_mfd.c +++ b/src/gen75_mfd.c @@ -2140,12 +2140,17 @@ gen75_mfd_vc1_pic_state(VADriverContextP ctx, } } - if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || - (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && - pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) - interpolation_mode = 8 | pic_param->fast_uvmc_flag; - else - interpolation_mode = 0 | pic_param->fast_uvmc_flag; + if ((!pic_param->sequence_fields.bits.interlace || + pic_param->picture_fields.bits.frame_coding_mode != 1) && /* Progressive or Field-Interlace */ + (picture_type == GEN7_VC1_P_PICTURE || + picture_type == GEN7_VC1_B_PICTURE)) { + if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) + interpolation_mode = 8 | pic_param->fast_uvmc_flag; + else + interpolation_mode = 0 | pic_param->fast_uvmc_flag; + } BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFD_VC1_LONG_PIC_STATE | (6 - 2)); diff --git a/src/gen7_mfd.c b/src/gen7_mfd.c index 48b0c266..facdee5b 100644 --- a/src/gen7_mfd.c +++ b/src/gen7_mfd.c @@ -1874,12 +1874,17 @@ gen7_mfd_vc1_pic_state(VADriverContextP ctx, } } - if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || - (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && - pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) - interpolation_mode = 8 | pic_param->fast_uvmc_flag; - else - interpolation_mode = 0 | pic_param->fast_uvmc_flag; + if ((!pic_param->sequence_fields.bits.interlace || + pic_param->picture_fields.bits.frame_coding_mode != 1) && /* Progressive or Field-Interlace */ + (picture_type == GEN7_VC1_P_PICTURE || + picture_type == GEN7_VC1_B_PICTURE)) { + if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) + interpolation_mode = 8 | pic_param->fast_uvmc_flag; + else + interpolation_mode = 0 | pic_param->fast_uvmc_flag; + } BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFD_VC1_LONG_PIC_STATE | (6 - 2)); diff --git a/src/gen8_mfd.c b/src/gen8_mfd.c index 2bc97cf6..c9c06987 100644 --- a/src/gen8_mfd.c +++ b/src/gen8_mfd.c @@ -1919,12 +1919,17 @@ gen8_mfd_vc1_pic_state(VADriverContextP ctx, } } - if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || - (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && - pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) - interpolation_mode = 8 | pic_param->fast_uvmc_flag; - else - interpolation_mode = 0 | pic_param->fast_uvmc_flag; + if ((!pic_param->sequence_fields.bits.interlace || + pic_param->picture_fields.bits.frame_coding_mode != 1) && /* Progressive or Field-Interlace */ + (picture_type == GEN7_VC1_P_PICTURE || + picture_type == GEN7_VC1_B_PICTURE)) { + if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) + interpolation_mode = 8 | pic_param->fast_uvmc_flag; + else + interpolation_mode = 0 | pic_param->fast_uvmc_flag; + } BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFD_VC1_LONG_PIC_STATE | (6 - 2)); |