diff options
Diffstat (limited to 'src/gen8_render.c')
| -rw-r--r-- | src/gen8_render.c | 138 |
1 files changed, 77 insertions, 61 deletions
diff --git a/src/gen8_render.c b/src/gen8_render.c index a3ff1e6e..a89eb483 100644 --- a/src/gen8_render.c +++ b/src/gen8_render.c @@ -73,6 +73,10 @@ static const uint32_t ps_subpic_kernel_static_gen8[][4] = { #include "shaders/render/exa_wm_write.g8b" }; +static const uint32_t ps_clear_kernel_static_gen8[][4] = { +#include "shaders/render/exa_wm_src_affine.g8b" +#include "shaders/render/exa_wm_clear.g8b" +}; #define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 @@ -82,7 +86,8 @@ static const uint32_t ps_subpic_kernel_static_gen8[][4] = { enum { SF_KERNEL = 0, PS_KERNEL, - PS_SUBPIC_KERNEL + PS_SUBPIC_KERNEL, + PS_CLEAR_KERNEL }; static struct i965_kernel render_kernels_gen8[] = { @@ -107,6 +112,14 @@ static struct i965_kernel render_kernels_gen8[] = { ps_subpic_kernel_static_gen8, sizeof(ps_subpic_kernel_static_gen8), NULL + }, + + { + "PS_CLEAR", + PS_CLEAR_KERNEL, + ps_clear_kernel_static_gen8, + sizeof(ps_clear_kernel_static_gen8), + NULL } }; @@ -347,7 +360,8 @@ static void i965_fill_vertex_buffer( VADriverContextP ctx, float tex_coords[4], /* [(u1,v1);(u2,v2)] */ - float vid_coords[4] /* [(x1,y1);(x2,y2)] */ + float vid_coords[4], /* [(x1,y1);(x2,y2)] */ + int offset ) { struct i965_driver_data * const i965 = i965_driver_data(ctx); @@ -380,7 +394,7 @@ i965_fill_vertex_buffer( vb[10] = vid_coords[X1]; vb[11] = vid_coords[Y1]; - dri_bo_subdata(i965->render_state.vb.vertex_buffer, 0, sizeof(vb), vb); + dri_bo_subdata(i965->render_state.vb.vertex_buffer, offset, sizeof(vb), vb); } static void @@ -414,7 +428,7 @@ i965_subpic_render_upload_vertex(VADriverContextP ctx, vid_coords[2] = (float)(dst_rect.x + dst_rect.width); vid_coords[3] = (float)(dst_rect.y + dst_rect.height); - i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords, 0); } static void @@ -444,7 +458,24 @@ i965_render_upload_vertex( vid_coords[2] = vid_coords[0] + dst_rect->width; vid_coords[3] = vid_coords[1] + dst_rect->height; - i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords, 0); + + /* + * The vertices below are for background, and always set tex-coordinates + * although the tex-coordinates are not used in the the corresponding PS + * kernel. + */ + tex_coords[0] = 0.0F; + tex_coords[1] = 0.0F; + tex_coords[2] = 1.0F; + tex_coords[3] = 1.0F; + + vid_coords[0] = dest_region->x; + vid_coords[1] = dest_region->y; + vid_coords[2] = vid_coords[0] + dest_region->width; + vid_coords[3] = vid_coords[1] + dest_region->height; + + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords, 12 * sizeof(float)); } static void @@ -491,53 +522,6 @@ i965_render_upload_image_palette( ADVANCE_BATCH(batch); } -static void -gen8_clear_dest_region(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; - struct i965_render_state *render_state = &i965->render_state; - struct intel_region *dest_region = render_state->draw_region; - unsigned int blt_cmd, br13; - int pitch; - - blt_cmd = GEN8_XY_COLOR_BLT_CMD; - br13 = 0xf0 << 16; - pitch = dest_region->pitch; - - if (dest_region->cpp == 4) { - br13 |= BR13_8888; - blt_cmd |= (XY_COLOR_BLT_WRITE_RGB | XY_COLOR_BLT_WRITE_ALPHA); - } else { - assert(dest_region->cpp == 2); - br13 |= BR13_565; - } - - if (dest_region->tiling != I915_TILING_NONE) { - blt_cmd |= XY_COLOR_BLT_DST_TILED; - pitch /= 4; - } - - br13 |= pitch; - - intel_batchbuffer_start_atomic_blt(batch, 24); - BEGIN_BLT_BATCH(batch, 7); - - OUT_BATCH(batch, blt_cmd); - OUT_BATCH(batch, br13); - OUT_BATCH(batch, (dest_region->y << 16) | (dest_region->x)); - OUT_BATCH(batch, ((dest_region->y + dest_region->height) << 16) | - (dest_region->x + dest_region->width)); - OUT_RELOC(batch, dest_region->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0); - OUT_BATCH(batch, 0x0); - OUT_BATCH(batch, 0x0); - ADVANCE_BATCH(batch); - intel_batchbuffer_end_atomic(batch); -} - - /* * for GEN8 */ @@ -890,7 +874,7 @@ gen8_emit_cc_state_pointers(VADriverContextP ctx) } static void -gen8_emit_vertices(VADriverContextP ctx) +gen8_emit_vertices(VADriverContextP ctx, int offset) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; @@ -903,7 +887,7 @@ gen8_emit_vertices(VADriverContextP ctx) (0 << GEN8_VB0_MOCS_SHIFT) | GEN7_VB0_ADDRESS_MODIFYENABLE | ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); - OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, offset); OUT_BATCH(batch, 0); OUT_BATCH(batch, 12 * 4); ADVANCE_BATCH(batch); @@ -1382,7 +1366,8 @@ gen8_emit_wm_state(VADriverContextP ctx, int kernel) (GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE)); ADVANCE_BATCH(batch); - if (kernel == PS_KERNEL) { + if (kernel == PS_KERNEL || + kernel == PS_CLEAR_KERNEL) { BEGIN_BATCH(batch, 2); OUT_BATCH(batch, GEN8_3DSTATE_PSBLEND | (2 - 2)); OUT_BATCH(batch, @@ -1571,7 +1556,39 @@ gen7_emit_drawing_rectangle(VADriverContextP ctx) } static void -gen8_render_emit_states(VADriverContextP ctx, int kernel) +gen8_render_emit_states(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen8_emit_invarient_states(ctx); + gen8_emit_state_base_address(ctx); + gen8_emit_viewport_state_pointers(ctx); + gen8_emit_urb(ctx); + gen8_emit_cc_state_pointers(ctx); + gen8_emit_sampler_state_pointers(ctx); + gen8_emit_wm_hz_op(ctx); + gen8_emit_bypass_state(ctx); + gen8_emit_vs_state(ctx); + gen8_emit_clip_state(ctx); + gen8_emit_sf_state(ctx); + gen8_emit_depth_stencil_state(ctx); + gen8_emit_depth_buffer_state(ctx); + gen7_emit_drawing_rectangle(ctx); + gen8_emit_vertex_element_state(ctx); + /* clear background */ + gen8_emit_wm_state(ctx, PS_CLEAR_KERNEL); + gen8_emit_vertices(ctx, 12 * sizeof(float)); + /* draw the image */ + gen8_emit_wm_state(ctx, PS_KERNEL); + gen8_emit_vertices(ctx, 0); + intel_batchbuffer_end_atomic(batch); +} + +static void +gen8_subpicture_render_emit_states(VADriverContextP ctx) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; @@ -1590,11 +1607,11 @@ gen8_render_emit_states(VADriverContextP ctx, int kernel) gen8_emit_clip_state(ctx); gen8_emit_sf_state(ctx); gen8_emit_depth_stencil_state(ctx); - gen8_emit_wm_state(ctx, kernel); + gen8_emit_wm_state(ctx, PS_SUBPIC_KERNEL); gen8_emit_depth_buffer_state(ctx); gen7_emit_drawing_rectangle(ctx); gen8_emit_vertex_element_state(ctx); - gen8_emit_vertices(ctx); + gen8_emit_vertices(ctx, 0); intel_batchbuffer_end_atomic(batch); } @@ -1612,8 +1629,7 @@ gen8_render_put_surface( gen8_render_initialize(ctx); gen8_render_setup_states(ctx, obj_surface, src_rect, dst_rect, flags); - gen8_clear_dest_region(ctx); - gen8_render_emit_states(ctx, PS_KERNEL); + gen8_render_emit_states(ctx); intel_batchbuffer_flush(batch); } @@ -1714,7 +1730,7 @@ gen8_render_put_subpicture( assert(obj_subpic); gen8_render_initialize(ctx); gen8_subpicture_render_setup_states(ctx, obj_surface, src_rect, dst_rect); - gen8_render_emit_states(ctx, PS_SUBPIC_KERNEL); + gen8_subpicture_render_emit_states(ctx); i965_render_upload_image_palette(ctx, obj_subpic->obj_image, 0xff); intel_batchbuffer_flush(batch); } |