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authorXiang, Haihao <haihao.xiang@intel.com>2010-11-09 12:53:05 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2010-12-06 12:50:04 +0800
commitabc2523dcbf9c4080c4c1f7097a0cfcaa52b883f (patch)
tree552aebd4659ff5b47fbc7242958b614640eae0bc
parentff6eec3e4cdbee3f1afdd3121eee491919ce790a (diff)
downloadlibva-abc2523dcbf9c4080c4c1f7097a0cfcaa52b883f.tar.gz
i965_drv_video: dump MFX commands
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-rw-r--r--i965_drv_video/intel_batchbuffer_dump.c364
-rw-r--r--i965_drv_video/intel_batchbuffer_dump.h6
2 files changed, 369 insertions, 1 deletions
diff --git a/i965_drv_video/intel_batchbuffer_dump.c b/i965_drv_video/intel_batchbuffer_dump.c
index 0732f0f..99c2c1c 100644
--- a/i965_drv_video/intel_batchbuffer_dump.c
+++ b/i965_drv_video/intel_batchbuffer_dump.c
@@ -44,6 +44,7 @@ dump_mi(unsigned int *data, unsigned int offset, int count, unsigned int device,
{ 0x00, 0, 1, 1, "MI_NOOP" },
{ 0x04, 0, 1, 1, "MI_FLUSH" },
{ 0x0a, 0, 1, 1, "MI_BATCH_BUFFER_END" },
+ { 0x26, 0x3f, 4, 5, "MI_FLUSH_DW" },
};
opcode = ((data[0] & MASK_MI_OPCODE) >> SHIFT_MI_OPCODE);
@@ -350,6 +351,363 @@ dump_gfxpipe_bsd(unsigned int *data, unsigned int offset, int count, unsigned in
return length;
}
+static void
+dump_mfx_mode_select(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1,
+ "decoder mode: %d(%s),"
+ "post deblocking output enable %d,"
+ "pre deblocking output enable %d,"
+ "codec select: %d(%s),"
+ "standard select: %d(%s)"
+ "\n",
+ (data[1] >> 16) & 0x1, ((data[1] >> 16) & 0x1) ? "IT" : "VLD",
+ (data[1] >> 9) & 0x1,
+ (data[1] >> 8) & 0x1,
+ (data[1] >> 4) & 0x1, ((data[1] >> 4) & 0x1) ? "Encode" : "Decode",
+ (data[1] >> 0) & 0x3, ((data[1] >> 0) & 0x3) == 0 ? "MPEG2" :
+ ((data[1] >> 0) & 0x3) == 1 ? "VC1" :
+ ((data[1] >> 0) & 0x3) == 2 ? "AVC" : "Reserved");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+}
+
+static void
+dump_mfx_surface_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+}
+
+static void
+dump_mfx_pipe_buf_addr_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+ instr_out(data, offset, 6, "dword 06\n");
+ instr_out(data, offset, 7, "dword 07\n");
+ instr_out(data, offset, 8, "dword 08\n");
+ instr_out(data, offset, 9, "dword 09\n");
+ instr_out(data, offset, 10, "dword 10\n");
+ instr_out(data, offset, 11, "dword 11\n");
+ instr_out(data, offset, 12, "dword 12\n");
+ instr_out(data, offset, 13, "dword 13\n");
+ instr_out(data, offset, 14, "dword 14\n");
+ instr_out(data, offset, 15, "dword 15\n");
+ instr_out(data, offset, 16, "dword 16\n");
+ instr_out(data, offset, 17, "dword 17\n");
+ instr_out(data, offset, 18, "dword 18\n");
+ instr_out(data, offset, 19, "dword 19\n");
+ instr_out(data, offset, 20, "dword 20\n");
+ instr_out(data, offset, 21, "dword 21\n");
+ instr_out(data, offset, 22, "dword 22\n");
+ instr_out(data, offset, 24, "dword 23\n");
+}
+
+static void
+dump_mfx_ind_obj_base_addr_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+ instr_out(data, offset, 6, "dword 06\n");
+ instr_out(data, offset, 7, "dword 07\n");
+ instr_out(data, offset, 8, "dword 08\n");
+ instr_out(data, offset, 9, "dword 09\n");
+ instr_out(data, offset, 10, "dword 10\n");
+}
+
+static void
+dump_mfx_bsp_buf_base_addr_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+}
+
+static void
+dump_mfx_aes_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+ instr_out(data, offset, 6, "dword 06\n");
+}
+
+static void
+dump_mfx_state_pointer(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+}
+
+static int
+dump_mfx_common(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures)
+{
+ unsigned int subopcode;
+ int length, i;
+
+ struct {
+ unsigned int subopcode;
+ int min_len;
+ int max_len;
+ char *name;
+ void (*detail)(unsigned int *data, unsigned int offset, unsigned int device, int *failures);
+ } mfx_common_commands[] = {
+ { SUBOPCODE_MFX(0, 0), 0x04, 0x04, "MFX_PIPE_MODE_SELECT", dump_mfx_mode_select },
+ { SUBOPCODE_MFX(0, 1), 0x06, 0x06, "MFX_SURFACE_STATE", dump_mfx_surface_state },
+ { SUBOPCODE_MFX(0, 2), 0x18, 0x18, "MFX_PIPE_BUF_ADDR_STATE", dump_mfx_pipe_buf_addr_state },
+ { SUBOPCODE_MFX(0, 3), 0x0b, 0x0b, "MFX_IND_OBJ_BASE_ADDR_STATE", dump_mfx_ind_obj_base_addr_state },
+ { SUBOPCODE_MFX(0, 4), 0x04, 0x04, "MFX_BSP_BUF_BASE_ADDR_STATE", dump_mfx_bsp_buf_base_addr_state },
+ { SUBOPCODE_MFX(0, 5), 0x07, 0x07, "MFX_AES_STATE", dump_mfx_aes_state },
+ { SUBOPCODE_MFX(0, 6), 0x00, 0x00, "MFX_STATE_POINTER", dump_mfx_state_pointer },
+ };
+
+ subopcode = ((data[0] & MASK_GFXPIPE_SUBOPCODE) >> SHIFT_GFXPIPE_SUBOPCODE);
+
+ for (i = 0; i < ARRAY_ELEMS(mfx_common_commands); i++) {
+ if (subopcode == mfx_common_commands[i].subopcode) {
+ unsigned int index;
+
+ length = (data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH;
+ length += 2;
+ instr_out(data, offset, 0, "%s\n", mfx_common_commands[i].name);
+
+ if (length < mfx_common_commands[i].min_len ||
+ length > mfx_common_commands[i].max_len) {
+ fprintf(gout, "Bad length(%d) in %s [%d, %d]\n",
+ length, mfx_common_commands[i].name,
+ mfx_common_commands[i].min_len,
+ mfx_common_commands[i].max_len);
+ }
+
+ if (length - 1 >= count)
+ BUFFER_FAIL(count, length, mfx_common_commands[i].name);
+
+ if (mfx_common_commands[i].detail)
+ mfx_common_commands[i].detail(data, offset, device, failures);
+ else {
+ for (index = 1; index < length; index++)
+ instr_out(data, offset, index, "dword %d\n", index);
+ }
+
+ return length;
+ }
+ }
+
+ instr_out(data, offset, 0, "UNKNOWN MFX COMMON COMMAND\n");
+ (*failures)++;
+ return 1;
+}
+
+static void
+dump_mfx_avc_img_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+ instr_out(data, offset, 6, "dword 06\n");
+ instr_out(data, offset, 7, "dword 07\n");
+ instr_out(data, offset, 8, "dword 08\n");
+ instr_out(data, offset, 9, "dword 09\n");
+ instr_out(data, offset, 10, "dword 10\n");
+ instr_out(data, offset, 11, "dword 11\n");
+ instr_out(data, offset, 12, "dword 12\n");
+}
+
+static void
+dump_mfx_avc_qm_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ unsigned int length = ((data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH) + 2;
+ int i;
+
+ instr_out(data, offset, 1, "user default: %02x, QM list present: %02x\n",
+ (data[1] >> 8) & 0xff, data[1] & 0xff);
+
+ for (i = 2; i < length; i++) {
+ instr_out(data, offset, i, "dword %d\n", i);
+ }
+}
+
+static void
+dump_mfx_avc_directmode_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ int i;
+
+ for (i = 1; i < 33; i++) {
+ instr_out(data, offset, i, "Direct MV Buffer Base Address for Picture %d\n", i - 1);
+ }
+
+ for (i = 33; i < 35; i++) {
+ instr_out(data, offset, i, "Direct MV Buffer Base Address for Current Decoding Frame/Field\n");
+ }
+
+ for (i = 35; i < 69; i++) {
+ instr_out(data, offset, i, "POC List\n");
+ }
+}
+
+static void
+dump_mfx_avc_slice_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+ instr_out(data, offset, 6, "dword 06\n");
+ instr_out(data, offset, 7, "dword 07\n");
+ instr_out(data, offset, 8, "dword 08\n");
+ instr_out(data, offset, 9, "dword 09\n");
+}
+
+static void
+dump_mfx_avc_ref_idx_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ instr_out(data, offset, 1, "dword 01\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+ instr_out(data, offset, 6, "dword 06\n");
+ instr_out(data, offset, 7, "dword 07\n");
+ instr_out(data, offset, 8, "dword 08\n");
+ instr_out(data, offset, 9, "dword 09\n");
+}
+
+static void
+dump_mfx_avc_weightoffset_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ int i;
+
+ instr_out(data, offset, 1,
+ "Weight and Offset L%d table\n",
+ (data[1] >> 0) & 0x1);
+
+ for (i = 2; i < 31; i++) {
+ instr_out(data, offset, i, "dword %d\n", i);
+ }
+}
+
+static void
+dump_mfd_bsd_object(unsigned int *data, unsigned int offset, unsigned int device, int *failures)
+{
+ int is_phantom_slice = ((data[1] & 0x3fffff) == 0);
+
+ if (is_phantom_slice) {
+ instr_out(data, offset, 1, "phantom slice\n");
+ instr_out(data, offset, 2, "dword 02\n");
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4, "dword 04\n");
+ instr_out(data, offset, 5, "dword 05\n");
+ } else {
+ instr_out(data, offset, 1, "Indirect BSD Data Length: %d\n", data[1] & 0x3fffff);
+ instr_out(data, offset, 2, "Indirect BSD Data Start Address: 0x%08x\n", data[2] & 0x1fffffff);
+ instr_out(data, offset, 3, "dword 03\n");
+ instr_out(data, offset, 4,
+ "First_MB_Byte_Offset of Slice Data from Slice Header: 0x%08x,"
+ "slice header skip mode: %d"
+ "\n",
+ (data[4] >> 16),
+ (data[4] >> 6) & 0x1);
+ instr_out(data, offset, 5, "dword 05\n");
+ }
+}
+
+static int
+dump_mfx_avc(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures)
+{
+ unsigned int subopcode;
+ int length, i;
+
+ struct {
+ unsigned int subopcode;
+ int min_len;
+ int max_len;
+ char *name;
+ void (*detail)(unsigned int *data, unsigned int offset, unsigned int device, int *failures);
+ } mfx_avc_commands[] = {
+ { SUBOPCODE_MFX(0, 0), 0x0d, 0x0d, "MFX_AVC_IMG_STATE", dump_mfx_avc_img_state },
+ { SUBOPCODE_MFX(0, 1), 0x02, 0x3a, "MFX_AVC_QM_STATE", dump_mfx_avc_qm_state },
+ { SUBOPCODE_MFX(0, 2), 0x45, 0x45, "MFX_AVC_DIRECTMODE_STATE", dump_mfx_avc_directmode_state },
+ { SUBOPCODE_MFX(0, 3), 0x0b, 0x0b, "MFX_AVC_SLICE_STATE", dump_mfx_avc_slice_state },
+ { SUBOPCODE_MFX(0, 4), 0x0a, 0x0a, "MFX_AVC_REF_IDX_STATE", dump_mfx_avc_ref_idx_state },
+ { SUBOPCODE_MFX(0, 5), 0x32, 0x32, "MFX_AVC_WEIGHTOFFSET_STATE", dump_mfx_avc_weightoffset_state },
+ { SUBOPCODE_MFX(1, 8), 0x06, 0x06, "MFD_AVC_BSD_OBJECT", dump_mfd_bsd_object },
+ };
+
+ subopcode = ((data[0] & MASK_GFXPIPE_SUBOPCODE) >> SHIFT_GFXPIPE_SUBOPCODE);
+
+ for (i = 0; i < ARRAY_ELEMS(mfx_avc_commands); i++) {
+ if (subopcode == mfx_avc_commands[i].subopcode) {
+ unsigned int index;
+
+ length = (data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH;
+ length += 2;
+ instr_out(data, offset, 0, "%s\n", mfx_avc_commands[i].name);
+
+ if (length < mfx_avc_commands[i].min_len ||
+ length > mfx_avc_commands[i].max_len) {
+ fprintf(gout, "Bad length(%d) in %s [%d, %d]\n",
+ length, mfx_avc_commands[i].name,
+ mfx_avc_commands[i].min_len,
+ mfx_avc_commands[i].max_len);
+ }
+
+ if (length - 1 >= count)
+ BUFFER_FAIL(count, length, mfx_avc_commands[i].name);
+
+ if (mfx_avc_commands[i].detail)
+ mfx_avc_commands[i].detail(data, offset, device, failures);
+ else {
+ for (index = 1; index < length; index++)
+ instr_out(data, offset, index, "dword %d\n", index);
+ }
+
+ return length;
+ }
+ }
+
+ instr_out(data, offset, 0, "UNKNOWN MFX AVC COMMAND\n");
+ (*failures)++;
+ return 1;
+}
+
+static int
+dump_gfxpipe_mfx(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures)
+{
+ int length;
+
+ switch ((data[0] & MASK_GFXPIPE_OPCODE) >> SHIFT_GFXPIPE_OPCODE) {
+ case OPCODE_MFX_COMMON:
+ length = dump_mfx_common(data, offset, count, device, failures);
+ break;
+
+ case OPCODE_MFX_AVC:
+ length = dump_mfx_avc(data, offset, count, device, failures);
+ break;
+
+ default:
+ length = 1;
+ (*failures)++;
+ instr_out(data, offset, 0, "UNKNOWN MFX OPCODE\n");
+ break;
+ }
+
+ return length;
+}
+
static int
dump_gfxpipe(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures)
{
@@ -361,7 +719,11 @@ dump_gfxpipe(unsigned int *data, unsigned int offset, int count, unsigned int de
break;
case GFXPIPE_BSD:
- length = dump_gfxpipe_bsd(data, offset, count, device, failures);
+ if (IS_GEN6(device))
+ length = dump_gfxpipe_mfx(data, offset, count, device, failures);
+ else
+ length = dump_gfxpipe_bsd(data, offset, count, device, failures);
+
break;
default:
diff --git a/i965_drv_video/intel_batchbuffer_dump.h b/i965_drv_video/intel_batchbuffer_dump.h
index ad096a9..e76b4f7 100644
--- a/i965_drv_video/intel_batchbuffer_dump.h
+++ b/i965_drv_video/intel_batchbuffer_dump.h
@@ -36,6 +36,12 @@
#define SUBOPCODE_BSD_IND_OBJ 4
#define SUBOPCODE_BSD_OBJECT 8
+/* MFX */
+#define OPCODE_MFX_COMMON 0
+#define OPCODE_MFX_AVC 1
+
+#define SUBOPCODE_MFX(A, B) ((A) << 5 | (B))
+
/* MI */
#define MASK_MI_OPCODE 0x1F800000