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author | Xiang, Haihao <haihao.xiang@intel.com> | 2011-05-26 10:33:47 +0800 |
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committer | Xiang, Haihao <haihao.xiang@intel.com> | 2011-06-09 10:42:03 +0800 |
commit | 76c1fcf1b544e787e3f0525ab465a5eabbc4476f (patch) | |
tree | fea1e987d1abd48bc32901ac59aec3454f73248b | |
parent | 232185022e5f007790e4cd8e22828bae0fa35afc (diff) | |
download | libva-76c1fcf1b544e787e3f0525ab465a5eabbc4476f.tar.gz |
i965_drv_video: clean up
Don't emit PIPE_CONTROL directly, instead call intel_batchbuffer_emit_mi_flush.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-rw-r--r-- | i965_drv_video/gen6_vme.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/i965_drv_video/gen6_vme.c b/i965_drv_video/gen6_vme.c index be23d0d..cefd396 100644 --- a/i965_drv_video/gen6_vme.c +++ b/i965_drv_video/gen6_vme.c @@ -637,12 +637,7 @@ static void gen6_vme_pipeline_programing(VADriverContextP ctx, if (emit_new_state) { /*Step1: MI_FLUSH/PIPE_CONTROL*/ - BEGIN_BATCH(batch, 4); - OUT_BATCH(batch, CMD_PIPE_CONTROL | 0x02); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - ADVANCE_BATCH(batch); + intel_batchbuffer_emit_mi_flush(batch); /*Step2: State command PIPELINE_SELECT*/ gen6_vme_pipeline_select(ctx, gen6_encoder_context); |