diff options
Diffstat (limited to 'i965_drv_video/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i')
-rw-r--r-- | i965_drv_video/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i | 56 |
1 files changed, 0 insertions, 56 deletions
diff --git a/i965_drv_video/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i b/i965_drv_video/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i deleted file mode 100644 index 6351ec5..0000000 --- a/i965_drv_video/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright © 2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDINg BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINgEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIgHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAgES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISINg FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINgS IN THE - * SOFTWARE. - * - * Author: - * Zou Nan hai <nanhai.zou@intel.com> - * Zhang Hua jun <huajun.zhang@intel.com> - * Xing Dong sheng <dongsheng.xing@intel.com> - * - */ -mov (1) g32.8<1>UD 0x007001FUD {align1}; -send (16) 0 g34.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 8 {align1}; //U -send (16) 0 g44.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 8 {align1}; //V -add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; -mov (1) g32.8<1>UD 0x1FUD {align1}; -send (16) 0 g42.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; //U -send (16) 0 g52.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; //V - -//U -avg (8) g74.0<1>UW g34.0<8,8,1>UB g35.0<8,8,1>UB {align1}; -avg (8) g74.16<1>UW g35.0<8,8,1>UB g36.0<8,8,1>UB {align1}; -avg (8) g75.0<1>UW g36.0<8,8,1>UB g37.0<8,8,1>UB {align1}; -avg (8) g75.16<1>UW g37.0<8,8,1>UB g38.0<8,8,1>UB {align1}; -avg (8) g76.0<1>UW g38.0<8,8,1>UB g39.0<8,8,1>UB {align1}; -avg (8) g76.16<1>UW g39.0<8,8,1>UB g40.0<8,8,1>UB {align1}; -avg (8) g77.0<1>UW g40.0<8,8,1>UB g41.0<8,8,1>UB {align1}; -avg (8) g77.16<1>UW g41.0<8,8,1>UB g42.0<8,8,1>UB {align1}; - -//V -avg (8) g78.0<1>UW g44.0<8,8,1>UB g45.0<8,8,1>UB {align1}; -avg (8) g78.16<1>UW g45.0<8,8,1>UB g46.0<8,8,1>UB {align1}; -avg (8) g79.0<1>UW g46.0<8,8,1>UB g47.0<8,8,1>UB {align1}; -avg (8) g79.16<1>UW g47.0<8,8,1>UB g48.0<8,8,1>UB {align1}; -avg (8) g80.0<1>UW g48.0<8,8,1>UB g49.0<8,8,1>UB {align1}; -avg (8) g80.16<1>UW g49.0<8,8,1>UB g50.0<8,8,1>UB {align1}; -avg (8) g81.0<1>UW g50.0<8,8,1>UB g51.0<8,8,1>UB {align1}; -avg (8) g81.16<1>UW g51.0<8,8,1>UB g52.0<8,8,1>UB {align1}; - |