From 14e4803468731311a3c0c4cb333ceb6269a3b04f Mon Sep 17 00:00:00 2001 From: Zhou Chang Date: Fri, 1 Apr 2011 15:07:46 +0800 Subject: i965_drv_vidoe: Encoder on Sandy Bridge Currently it supports Intra frame Signed-off-by: Zhou Chang Signed-off-by: Xiang, Haihao --- i965_drv_video/gen6_vme.h | 87 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 i965_drv_video/gen6_vme.h (limited to 'i965_drv_video/gen6_vme.h') diff --git a/i965_drv_video/gen6_vme.h b/i965_drv_video/gen6_vme.h new file mode 100644 index 0000000..5e01506 --- /dev/null +++ b/i965_drv_video/gen6_vme.h @@ -0,0 +1,87 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWAR + * + * Authors: + * Zhou Chang + * + */ + +#ifndef _GEN6_MEDIA_H_ +#define _GEN6_MEDIA_H_ + +#include +#include +#include +#include + + +#define MAX_INTERFACE_DESC_GEN6 32 +#define MAX_MEDIA_SURFACES_GEN6 34 + +struct mfc_encode_state; + +struct gen6_media_state +{ + struct { + dri_bo *bo; + } surface_state[MAX_MEDIA_SURFACES_GEN6]; + + struct { + dri_bo *bo; + } binding_table; + + struct { + dri_bo *bo; + } idrt; /* interface descriptor remap table */ + + struct { + dri_bo *bo; + } curbe; + + struct { + unsigned int gpgpu_mode:1; + unsigned int max_num_threads:16; + unsigned int num_urb_entries:8; + unsigned int urb_entry_size:16; + unsigned int curb_size:16; + } vfe_state; + + struct { + dri_bo *bo; + } vme_state; + + struct { + dri_bo *bo; + unsigned int num_blocks; + unsigned int size_block; /* in bytes */ + unsigned int pitch; + } vme_output; +}; + +VAStatus gen6_vme_media_pipeline(VADriverContextP ctx, + VAContextID context, + struct mfc_encode_state *encode_state); +Bool gen6_vme_init(VADriverContextP ctx); +Bool gen6_vme_terminate(VADriverContextP ctx); + +#endif /* _GEN6_MEDIA_H_ */ -- cgit v1.2.1