From 9ac07d29e230c34d678126dec84550d5a31104d8 Mon Sep 17 00:00:00 2001 From: Austin Yuan Date: Thu, 2 Jul 2009 17:02:12 +0800 Subject: Apply the patch from Nanhai to support MPEG2 VLD on Intel integrated G45 graphics Signed-off-by: Austin Yuan --- .../shaders/mpeg2/vld/field_backward.g4a | 99 ++++++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 i965_drv_video/shaders/mpeg2/vld/field_backward.g4a (limited to 'i965_drv_video/shaders/mpeg2/vld/field_backward.g4a') diff --git a/i965_drv_video/shaders/mpeg2/vld/field_backward.g4a b/i965_drv_video/shaders/mpeg2/vld/field_backward.g4a new file mode 100644 index 0000000..1696ff3 --- /dev/null +++ b/i965_drv_video/shaders/mpeg2/vld/field_backward.g4a @@ -0,0 +1,99 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai + * Yan Li + * Liu Xi bin + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ + +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +//Y of top field +first_field_picture: +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; //motion vertical field select forward +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface',`7') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_y.g4i') +//UV of top field +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; //motion vertical field select forward +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface_u', `8') +define(`surface_v', `9') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_uv.g4i') +jmpi field_addidct; + +second_field_picture: +//Y of bottom field +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface',`3') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_y.g4i') +//UV of bottom field +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface_u', `10') +define(`surface_v', `11') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_uv.g4i') + +field_addidct: +include(`field_addidct.g4i') +out: +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; -- cgit v1.2.1