drm/tegra: debug registers

4 files changed, 25 insertions, 5 deletions

diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c
index c487c7b98cd7..50d69fdde8aa 100644
--- a/drivers/gpu/drm/tegra/dpaux.c
+++ b/drivers/gpu/drm/tegra/dpaux.c
@@ -63,14 +63,22 @@ static inline struct tegra_dpaux *work_to_dpaux(struct work_struct *work)
 }
 
 static inline u32 tegra_dpaux_readl(struct tegra_dpaux *dpaux,
-				    unsigned long offset)
+				    unsigned int offset)
 {
-	return readl(dpaux->regs + (offset << 2));
+	u32 value = readl(dpaux->regs + (offset << 2));
+
+	if (drm_tegra_debug & DRM_TEGRA_DEBUG_REGISTER)
+		dev_dbg(dpaux->dev, "%08x > %08x\n", offset, value);
+
+	return value;
 }
 
 static inline void tegra_dpaux_writel(struct tegra_dpaux *dpaux,
-				      u32 value, unsigned long offset)
+				      u32 value, unsigned int offset)
 {
+	if (drm_tegra_debug & DRM_TEGRA_DEBUG_REGISTER)
+		dev_dbg(dpaux->dev, "%08x < %08x\n", offset, value);
+
 	writel(value, dpaux->regs + (offset << 2));
 }
 
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index cdf27f843dd5..d347188bf8f4 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -23,6 +23,9 @@
 #define DRIVER_MINOR 0
 #define DRIVER_PATCHLEVEL 0
 
+unsigned int drm_tegra_debug = 0;
+module_param_named(debug, drm_tegra_debug, int, 0600);
+
 struct tegra_drm_file {
 	struct list_head contexts;
 };
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index 400e0d1c956d..a39abc85b4de 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -281,4 +281,8 @@ extern struct platform_driver tegra_sor_driver;
 extern struct platform_driver tegra_gr2d_driver;
 extern struct platform_driver tegra_gr3d_driver;
 
+#define DRM_TEGRA_DEBUG_REGISTER (1 << 0)
+
+extern unsigned int drm_tegra_debug;
+
 #endif /* HOST1X_DRM_H */
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index 9ea1f4b9bbca..f8f8d61ab9cd 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -208,14 +208,19 @@ static inline struct tegra_sor *to_sor(struct tegra_output *output)
 static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned int offset)
 {
 	u32 value = readl(sor->regs + (offset << 2));
-	dev_dbg(sor->dev, "%08x > %08x\n", offset, value);
+
+	if (drm_tegra_debug & DRM_TEGRA_DEBUG_REGISTER)
+		dev_dbg(sor->dev, "%08x > %08x\n", offset, value);
+
 	return value;
 }
 
 static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value,
 				    unsigned int offset)
 {
-	dev_dbg(sor->dev, "%08x < %08x\n", offset, value);
+	if (drm_tegra_debug & DRM_TEGRA_DEBUG_REGISTER)
+		dev_dbg(sor->dev, "%08x < %08x\n", offset, value);
+
 	writel(value, sor->regs + (offset << 2));
 }