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author | Dave Martin <Dave.Martin@arm.com> | 2019-04-18 18:41:38 +0100 |
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committer | Will Deacon <will.deacon@arm.com> | 2019-04-23 18:02:00 +0100 |
commit | 06a916feca2b262ab0c1a2aeb68882f4b1108a07 (patch) | |
tree | 7687db5cfb7163edb21e8f6d13bcea9c5c8488e8 /Documentation/arm64/sve.txt | |
parent | dd523791c939cfe642557cb2fac754ac0fed80fe (diff) | |
download | linux-next-06a916feca2b262ab0c1a2aeb68882f4b1108a07.tar.gz |
arm64: Expose SVE2 features for userspace
This patch provides support for reporting the presence of SVE2 and
its optional features to userspace.
This will also enable visibility of SVE2 for guests, when KVM
support for SVE-enabled guests is available.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'Documentation/arm64/sve.txt')
-rw-r--r-- | Documentation/arm64/sve.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/arm64/sve.txt b/Documentation/arm64/sve.txt index 7169a0ec41d8..9940e924a47e 100644 --- a/Documentation/arm64/sve.txt +++ b/Documentation/arm64/sve.txt @@ -34,6 +34,23 @@ model features for SVE is included in Appendix A. following sections: software that needs to verify that those interfaces are present must check for HWCAP_SVE instead. +* On hardware that supports the SVE2 extensions, HWCAP2_SVE2 will also + be reported in the AT_HWCAP2 aux vector entry. In addition to this, + optional extensions to SVE2 may be reported by the presence of: + + HWCAP2_SVE2 + HWCAP2_SVEAES + HWCAP2_SVEPMULL + HWCAP2_SVEBITPERM + HWCAP2_SVESHA3 + HWCAP2_SVESM4 + + This list may be extended over time as the SVE architecture evolves. + + These extensions are also reported via the CPU ID register ID_AA64ZFR0_EL1, + which userspace can read using an MRS instruction. See elf_hwcaps.txt and + cpu-feature-registers.txt for details. + * Debuggers should restrict themselves to interacting with the target via the NT_ARM_SVE regset. The recommended way of detecting support for this regset is to connect to a target process first and then attempt a |