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authorBinghua Duan <binghua.duan@csr.com>2011-07-08 17:40:12 +0800
committerBarry Song <21cnbao@gmail.com>2011-07-09 07:19:28 +0800
commit02c981c07bc95ac1e42ec6c817f0c28cf3fe993a (patch)
tree3b0f9a368d7d3b4cef3eab9128a0c3d95e8188d4 /arch/arm/Makefile
parentf1bb20a8365f6753e0f7b6e94981ca2b662bae13 (diff)
downloadlinux-next-02c981c07bc95ac1e42ec6c817f0c28cf3fe993a.tar.gz
ARM: CSR: Adding CSR SiRFprimaII board support
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: Binghua Duan <Binghua.Duan@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Yuping Luo <Yuping.Luo@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Signed-off-by: Huayi Li <Huayi.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/Makefile')
-rw-r--r--arch/arm/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index f5b2b390c8f2..1d693d06257e 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -169,6 +169,7 @@ machine-$(CONFIG_ARCH_OMAP3) := omap2
machine-$(CONFIG_ARCH_OMAP4) := omap2
machine-$(CONFIG_ARCH_ORION5X) := orion5x
machine-$(CONFIG_ARCH_PNX4008) := pnx4008
+machine-$(CONFIG_ARCH_PRIMA2) := prima2
machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_RPC) := rpc