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| author | Roger Quadros <rogerq@ti.com> | 2016-04-07 13:25:40 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2016-04-12 14:32:02 -0700 |
| commit | 4cb53a2308a96d97854b166780dace58737446ed (patch) | |
| tree | 092e861062ea430afbe3bf939d463310b849c1e4 /arch/arm/boot/dts/am43xx-clocks.dtsi | |
| parent | 63015d73f345a9196e910b84c3f329a22556bcf4 (diff) | |
| download | linux-next-4cb53a2308a96d97854b166780dace58737446ed.tar.gz | |
ARM: dts: omap3-beagle: Provide NAND ready pin
On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.
For NAND we don't use GPMC wait pin monitoring but
get the NAND Ready/Busy# status using GPIOlib.
GPMC driver provides the WAIT0 pin status over GPIOlib.
Read speed increases from 13212 KiB/ to 15753 KiB/s
and write speed was unchanged at 4404 KiB/s.
Measured using mtd_speedtest.ko on omap3-beagle-c4.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am43xx-clocks.dtsi')
0 files changed, 0 insertions, 0 deletions