diff options
| author | Bartosz Golaszewski <bgolaszewski@baylibre.com> | 2019-02-14 15:51:58 +0100 |
|---|---|---|
| committer | Sekhar Nori <nsekhar@ti.com> | 2019-02-19 19:40:30 +0530 |
| commit | d0064594f20a9d46ac55af02139c7022971ea8fd (patch) | |
| tree | e9b9a64701b46fb8af132a4a4d5a0f05d08a8515 /arch/arm/mach-davinci/irq.c | |
| parent | 74b0eac24259980a86891ded5edf3523d148c343 (diff) | |
| download | linux-next-d0064594f20a9d46ac55af02139c7022971ea8fd.tar.gz | |
ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER
In order to support SPARSE_IRQ we first need to make davinci use the
generic irq handler for ARM. Translate the legacy assembly to C and
put the irq handlers into their respective drivers (aintc and cp-intc).
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/irq.c')
| -rw-r--r-- | arch/arm/mach-davinci/irq.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index efba6dbdfd62..363ca6d76cb0 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -29,11 +29,13 @@ #include <mach/cputype.h> #include <mach/common.h> #include <asm/mach/irq.h> +#include <asm/exception.h> #define FIQ_REG0_OFFSET 0x0000 #define FIQ_REG1_OFFSET 0x0004 #define IRQ_REG0_OFFSET 0x0008 #define IRQ_REG1_OFFSET 0x000C +#define IRQ_IRQENTRY_OFFSET 0x0014 #define IRQ_ENT_REG0_OFFSET 0x0018 #define IRQ_ENT_REG1_OFFSET 0x001C #define IRQ_INCTL_REG_OFFSET 0x0020 @@ -48,6 +50,11 @@ static inline void davinci_irq_writel(unsigned long value, int offset) __raw_writel(value, davinci_intc_base + offset); } +static inline unsigned long davinci_irq_readl(int offset) +{ + return readl_relaxed(davinci_intc_base + offset); +} + static __init void davinci_irq_setup_gc(void __iomem *base, unsigned int irq_start, unsigned int num) @@ -70,6 +77,21 @@ davinci_irq_setup_gc(void __iomem *base, IRQ_NOREQUEST | IRQ_NOPROBE, 0); } +static asmlinkage void __exception_irq_entry +davinci_handle_irq(struct pt_regs *regs) +{ + int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET); + + /* + * Use the formula for entry vector index generation from section + * 8.3.3 of the manual. + */ + irqnr >>= 2; + irqnr -= 1; + + handle_domain_irq(davinci_irq_domain, irqnr, regs); +} + /* ARM Interrupt Controller Initialization */ void __init davinci_irq_init(void) { @@ -133,4 +155,5 @@ void __init davinci_irq_init(void) davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32); irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq); + set_handle_irq(davinci_handle_irq); } |