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authorOlof Johansson <olof@lixom.net>2018-12-31 11:54:03 -0800
committerOlof Johansson <olof@lixom.net>2018-12-31 11:54:03 -0800
commitcac1fc8fb561ac766468394d49c3dd11a2b8cb44 (patch)
tree5483f72b13b766cfbd6f025d2a828fef3d1d0203 /arch/arm/mach-mmp
parentbd3fde386decf09317ff4a07cd0d05380a22f525 (diff)
parent54518ed45734bb7ebf2773b1d32120c62338cc93 (diff)
downloadlinux-next-cac1fc8fb561ac766468394d49c3dd11a2b8cb44.tar.gz
Merge branch 'fixes' into next/soc
Merge in fixes here, since the last batch didn't make it in before the release of 4.20, and we might as well group them with this set of patches. * fixes: (822 commits) arm64: dts: renesas: draak: Fix CVBS input ARM: dts: Fix OMAP4430 SDP Ethernet startup ARM: dts: am335x-pdu001: Fix polarity of card detection input ARM: OMAP1: ams-delta: Fix audio permanently muted ARM: dts: omap5: Fix dual-role mode on Super-Speed port arm64: dts: rockchip: fix rk3399-rockpro64 regulator gpios ARM: dts: imx7d-nitrogen7: Fix the description of the Wifi clock ARM: imx: update the cpu power up timing setting on i.mx6sx Revert "arm64: dts: marvell: add CPU Idle power state support on Armada 7K/8K" ARM: dts: imx7d-pico: Describe the Wifi clock ARM: dts: realview: Fix some more duplicate regulator nodes MAINTAINERS: update entry for MMP platform ARM: mmp/mmp2: fix cpu_is_mmp2() on mmp2-dt MAINTAINERS: mediatek: Update SoC entry ARM: dts: bcm2837: Fix polarity of wifi reset GPIOs + Linux 4.20-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r--arch/arm/mach-mmp/cputype.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-mmp/cputype.h b/arch/arm/mach-mmp/cputype.h
index 446edaeb78a7..a96abcf521b4 100644
--- a/arch/arm/mach-mmp/cputype.h
+++ b/arch/arm/mach-mmp/cputype.h
@@ -44,10 +44,12 @@ static inline int cpu_is_pxa910(void)
#define cpu_is_pxa910() (0)
#endif
-#ifdef CONFIG_CPU_MMP2
+#if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT)
static inline int cpu_is_mmp2(void)
{
- return (((read_cpuid_id() >> 8) & 0xff) == 0x58);
+ return (((read_cpuid_id() >> 8) & 0xff) == 0x58) &&
+ (((mmp_chip_id & 0xfff) == 0x410) ||
+ ((mmp_chip_id & 0xfff) == 0x610));
}
#else
#define cpu_is_mmp2() (0)