Merge branch 'tegra/soc' into next/soc

* tegra/soc:
  arm/tegra: Compile tegra_dt_init_irq only when CONFIG_OF
  arm/tegra: Make MACH_TEGRA_DT depend on ARCH_TEGRA_2x_SOC
  arm/tegra: Delete tegra_init_clock()
  arm/tegra: Fix section mismatch errors in tegra30 pinmux
  arm/tegra: Fix section mismatch errors in tegra20 pinmux
  arm/tegra: refresh defconfig for tegra30
  arm/tegra: add support for tegra30 based board cardhu
  arm/tegra: implement support for tegra30
  arm/tegra: pinmux tables and definitions for tegra30
  arm/tegra: add new fields to struct tegra_pingroup_desc
  arm/tegra: prepare pinmux code for multiple tegra variants
  arm/tegra: rename tegra20 pinmux files
  arm/tegra: generalize L2 cache initialization
  arm/tegra: use PMC reset
  arm/tegra: rename board-dt.c to board-dt-tegra20.c
  arm/tegra: prepare early init for multiple tegra variants
  arm/tegra: don't export clk_measure_input_freq
  arm/tegra: prepare clock code for multiple tegra variants
  arm/tegra: cleanup tegra20 support
  arm/tegra: clk_get should not be fatal

Conflicts:
	arch/arm/mach-tegra/board-dt-tegra20.c

1 files changed, 13 insertions, 5 deletions

diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e2272d263a83..6366654b54c5 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -182,20 +182,28 @@ static struct irqaction tegra_timer_irq = {
 static void __init tegra_init_timer(void)
 {
 	struct clk *clk;
-	unsigned long rate = clk_measure_input_freq();
+	unsigned long rate;
 	int ret;
 
 	clk = clk_get_sys("timer", NULL);
-	BUG_ON(IS_ERR(clk));
-	clk_enable(clk);
+	if (IS_ERR(clk)) {
+		pr_warn("Unable to get timer clock."
+			" Assuming 12Mhz input clock.\n");
+		rate = 12000000;
+	} else {
+		clk_enable(clk);
+		rate = clk_get_rate(clk);
+	}
 
 	/*
 	 * rtc registers are used by read_persistent_clock, keep the rtc clock
 	 * enabled
 	 */
 	clk = clk_get_sys("rtc-tegra", NULL);
-	BUG_ON(IS_ERR(clk));
-	clk_enable(clk);
+	if (IS_ERR(clk))
+		pr_warn("Unable to get rtc-tegra clock\n");
+	else
+		clk_enable(clk);
 
 #ifdef CONFIG_HAVE_ARM_TWD
 	twd_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x600);