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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-09-05 15:10:27 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-09-05 17:02:33 +0100
commitc0fc18c5bf016a9d56aee64974c1ccdb87f3c783 (patch)
treea5269222c380d39846d477c68264247e601a31fc /arch/arm
parent7c7095aa423b9b14038abc08fba84b9d7a33d643 (diff)
downloadlinux-next-c0fc18c5bf016a9d56aee64974c1ccdb87f3c783.tar.gz
[ARM] omap: fix lots of 'Using plain integer as NULL pointer'
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap1/clock.c8
-rw-r--r--arch/arm/mach-omap2/clock.c18
-rw-r--r--arch/arm/mach-omap2/serial.c2
-rw-r--r--arch/arm/plat-omap/dma.c2
4 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 51a9be6763fc..90ae0ef37d66 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -201,7 +201,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
return -EINVAL;
parent = clk->parent;
- if (unlikely(parent == 0))
+ if (unlikely(parent == NULL))
return -EIO;
realrate = parent->rate;
@@ -499,7 +499,7 @@ static int omap1_clk_enable_generic(struct clk *clk)
if (clk->flags & ALWAYS_ENABLED)
return 0;
- if (unlikely(clk->enable_reg == 0)) {
+ if (unlikely(clk->enable_reg == NULL)) {
printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
clk->name);
return -EINVAL;
@@ -535,7 +535,7 @@ static void omap1_clk_disable_generic(struct clk *clk)
__u16 regval16;
__u32 regval32;
- if (clk->enable_reg == 0)
+ if (clk->enable_reg == NULL)
return;
if (clk->flags & ENABLE_REG_32BIT) {
@@ -577,7 +577,7 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
return clk->parent->rate / (1 << dsor_exp);
}
- if(clk->round_rate != 0)
+ if (clk->round_rate != NULL)
return clk->round_rate(clk, rate);
return clk->rate;
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1d891e4a6933..84cd1d9fcef9 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -251,7 +251,7 @@ int _omap2_clk_enable(struct clk *clk)
if (clk->enable)
return clk->enable(clk);
- if (unlikely(clk->enable_reg == 0)) {
+ if (unlikely(clk->enable_reg == NULL)) {
printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
clk->name);
return 0; /* REVISIT: -EINVAL */
@@ -283,7 +283,7 @@ void _omap2_clk_disable(struct clk *clk)
return;
}
- if (clk->enable_reg == 0) {
+ if (clk->enable_reg == NULL) {
/*
* 'Independent' here refers to a clock which is not
* controlled by its parent.
@@ -477,7 +477,7 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate)
/* Given a clock and a rate apply a clock specific rounding function */
long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
{
- if (clk->round_rate != 0)
+ if (clk->round_rate != NULL)
return clk->round_rate(clk, rate);
if (clk->flags & RATE_FIXED)
@@ -566,7 +566,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
*/
void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask)
{
- if (unlikely((clk->clksel_reg == 0) || (clk->clksel_mask == 0)))
+ if (unlikely((clk->clksel_reg == NULL) || (clk->clksel_mask == NULL)))
return NULL;
*field_mask = clk->clksel_mask;
@@ -586,7 +586,7 @@ u32 omap2_clksel_get_divisor(struct clk *clk)
void __iomem *div_addr;
div_addr = omap2_get_clksel(clk, &field_mask);
- if (div_addr == 0)
+ if (div_addr == NULL)
return 0;
field_val = __raw_readl(div_addr) & field_mask;
@@ -605,7 +605,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
return -EINVAL;
div_addr = omap2_get_clksel(clk, &field_mask);
- if (div_addr == 0)
+ if (div_addr == NULL)
return -EINVAL;
field_val = omap2_divisor_to_clksel(clk, new_div);
@@ -643,7 +643,7 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
return -EINVAL;
/* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
- if (clk->set_rate != 0)
+ if (clk->set_rate != NULL)
ret = clk->set_rate(clk, rate);
if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
@@ -664,7 +664,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr,
const struct clksel_rate *clkr;
*parent_div = 0;
- *src_addr = 0;
+ *src_addr = NULL;
clks = omap2_get_clksel_by_parent(clk, src_clk);
if (clks == NULL)
@@ -705,7 +705,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
field_val = omap2_clksel_get_src_field(&src_addr, new_parent,
&field_mask, clk, &parent_div);
- if (src_addr == 0)
+ if (src_addr == NULL)
return -EINVAL;
if (clk->usecount > 0)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 7faa53c3a925..69651cf08305 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -108,7 +108,7 @@ void __init omap_serial_init()
struct plat_serial8250_port *p = serial_platform_data + i;
if (!(info->enabled_uarts & (1 << i))) {
- p->membase = 0;
+ p->membase = NULL;
p->mapbase = 0;
continue;
}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b4057e271875..50f8b4ad9a09 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1233,7 +1233,7 @@ int omap_request_dma_chain(int dev_id, const char *dev_name,
/* request and reserve DMA channels for the chain */
for (i = 0; i < no_of_chans; i++) {
err = omap_request_dma(dev_id, dev_name,
- callback, 0, &channels[i]);
+ callback, NULL, &channels[i]);
if (err < 0) {
int j;
for (j = 0; j < i; j++)