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| author | poonam aggrwal <poonam.aggrwal@freescale.com> | 2015-09-19 23:45:42 +0530 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-10-17 00:36:34 -0500 |
| commit | 52246445516e99a59f531a8c72bee8f715a5fd1f (patch) | |
| tree | ec61b0fd82b70db590d51825d6dd6beb4c6e3d55 /arch/powerpc/boot/dts/fsl/b4si-post.dtsi | |
| parent | dc37374b9c83382b91f3804845ae593bedc2d13a (diff) | |
| download | linux-next-52246445516e99a59f531a8c72bee8f715a5fd1f.tar.gz | |
powerpc/b4860: Renamed the L2 caches
To make provision for more than one L2 caches in the system, change the
name from L2 to L2_1; same as in T4 platforms.
* Also remove the L2 entry from common file
"arch/powerpc/boot/dts/fsl/b4si-post.dtsi"
Keep them only in separate files for b4860 and b4420.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/b4si-post.dtsi')
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi index 603910ac1db0..d45ff04c2dde 100644 --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi @@ -465,10 +465,4 @@ bman: bman@31a000 { interrupts = <16 2 1 29>; }; - - L2: l2-cache-controller@c20000 { - compatible = "fsl,b4-l2-cache-controller"; - reg = <0xc20000 0x1000>; - next-level-cache = <&cpc>; - }; }; |