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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2014-06-20 14:37:40 +0200 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2014-07-15 18:02:29 +0900 |
commit | 28564f0893750f52085744d5d5728fc7631eefb6 (patch) | |
tree | ad20f02386373806b7d429338ded3f5fd47e03fb /arch/sh/kernel/cpu/sh4a/setup-sh7757.c | |
parent | 6b32fafee2bb5fcf0b3d3d04a9762d3a0212089e (diff) | |
download | linux-next-28564f0893750f52085744d5d5728fc7631eefb6.tar.gz |
sh: dma: Use defines instead of hardcoded numbers
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7757.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c index 7b24ec4b409a..18bcd70cd813 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c @@ -123,28 +123,28 @@ static const struct sh_dmae_slave_config sh7757_dmae0_slaves[] = { { .slave_id = SHDMA_SLAVE_SDHI_TX, .addr = 0x1fe50030, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_16BIT), .mid_rid = 0xc5, }, { .slave_id = SHDMA_SLAVE_SDHI_RX, .addr = 0x1fe50030, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_16BIT), .mid_rid = 0xc6, }, { .slave_id = SHDMA_SLAVE_MMCIF_TX, .addr = 0x1fcb0034, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_32BIT), .mid_rid = 0xd3, }, { .slave_id = SHDMA_SLAVE_MMCIF_RX, .addr = 0x1fcb0034, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_32BIT), .mid_rid = 0xd7, }, @@ -154,56 +154,56 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { { .slave_id = SHDMA_SLAVE_SCIF2_TX, .addr = 0x1f4b000c, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x21, }, { .slave_id = SHDMA_SLAVE_SCIF2_RX, .addr = 0x1f4b0014, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x22, }, { .slave_id = SHDMA_SLAVE_SCIF3_TX, .addr = 0x1f4c000c, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x29, }, { .slave_id = SHDMA_SLAVE_SCIF3_RX, .addr = 0x1f4c0014, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x2a, }, { .slave_id = SHDMA_SLAVE_SCIF4_TX, .addr = 0x1f4d000c, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x41, }, { .slave_id = SHDMA_SLAVE_SCIF4_RX, .addr = 0x1f4d0014, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x42, }, { .slave_id = SHDMA_SLAVE_RSPI_TX, .addr = 0xfe480004, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_16BIT), .mid_rid = 0xc1, }, { .slave_id = SHDMA_SLAVE_RSPI_RX, .addr = 0xfe480004, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_16BIT), .mid_rid = 0xc2, }, @@ -213,70 +213,70 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { { .slave_id = SHDMA_SLAVE_RIIC0_TX, .addr = 0x1e500012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x21, }, { .slave_id = SHDMA_SLAVE_RIIC0_RX, .addr = 0x1e500013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x22, }, { .slave_id = SHDMA_SLAVE_RIIC1_TX, .addr = 0x1e510012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x29, }, { .slave_id = SHDMA_SLAVE_RIIC1_RX, .addr = 0x1e510013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x2a, }, { .slave_id = SHDMA_SLAVE_RIIC2_TX, .addr = 0x1e520012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0xa1, }, { .slave_id = SHDMA_SLAVE_RIIC2_RX, .addr = 0x1e520013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0xa2, }, { .slave_id = SHDMA_SLAVE_RIIC3_TX, .addr = 0x1e530012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0xa9, }, { .slave_id = SHDMA_SLAVE_RIIC3_RX, .addr = 0x1e530013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0xaf, }, { .slave_id = SHDMA_SLAVE_RIIC4_TX, .addr = 0x1e540012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0xc5, }, { .slave_id = SHDMA_SLAVE_RIIC4_RX, .addr = 0x1e540013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0xc6, }, @@ -286,70 +286,70 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { { .slave_id = SHDMA_SLAVE_RIIC5_TX, .addr = 0x1e550012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x21, }, { .slave_id = SHDMA_SLAVE_RIIC5_RX, .addr = 0x1e550013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x22, }, { .slave_id = SHDMA_SLAVE_RIIC6_TX, .addr = 0x1e560012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x29, }, { .slave_id = SHDMA_SLAVE_RIIC6_RX, .addr = 0x1e560013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x2a, }, { .slave_id = SHDMA_SLAVE_RIIC7_TX, .addr = 0x1e570012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x41, }, { .slave_id = SHDMA_SLAVE_RIIC7_RX, .addr = 0x1e570013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x42, }, { .slave_id = SHDMA_SLAVE_RIIC8_TX, .addr = 0x1e580012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x45, }, { .slave_id = SHDMA_SLAVE_RIIC8_RX, .addr = 0x1e580013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x46, }, { .slave_id = SHDMA_SLAVE_RIIC9_TX, .addr = 0x1e590012, - .chcr = SM_INC | 0x800 | 0x40000000 | + .chcr = SM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x51, }, { .slave_id = SHDMA_SLAVE_RIIC9_RX, .addr = 0x1e590013, - .chcr = DM_INC | 0x800 | 0x40000000 | + .chcr = DM_INC | RS_ERS | 0x40000000 | TS_INDEX2VAL(XMIT_SZ_8BIT), .mid_rid = 0x52, }, |