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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-01-08 16:24:38 +1100 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-01-08 16:24:38 +1100 |
| commit | 24f030175d30f019be41766cdf88c2ff03de19ff (patch) | |
| tree | 354232a84e82d5a721ed7b1a9af580ff2a59be8f /arch/x86/include/asm/mtrr.h | |
| parent | 4aa12f7b927c3cac0e0cf3503642597527d0ece0 (diff) | |
| parent | 9e42d0cf5020aaf217433cad1a224745241d212a (diff) | |
| download | linux-next-24f030175d30f019be41766cdf88c2ff03de19ff.tar.gz | |
Merge commit 'origin/master' into next
Diffstat (limited to 'arch/x86/include/asm/mtrr.h')
| -rw-r--r-- | arch/x86/include/asm/mtrr.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 7c1e4258b31e..cb988aab716d 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -57,6 +57,31 @@ struct mtrr_gentry { }; #endif /* !__i386__ */ +struct mtrr_var_range { + u32 base_lo; + u32 base_hi; + u32 mask_lo; + u32 mask_hi; +}; + +/* In the Intel processor's MTRR interface, the MTRR type is always held in + an 8 bit field: */ +typedef u8 mtrr_type; + +#define MTRR_NUM_FIXED_RANGES 88 +#define MTRR_MAX_VAR_RANGES 256 + +struct mtrr_state_type { + struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES]; + mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES]; + unsigned char enabled; + unsigned char have_fixed; + mtrr_type def_type; +}; + +#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) +#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) + /* These are the various ioctls */ #define MTRRIOC_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry) #define MTRRIOC_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry) |