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| author | Stephane Eranian <eranian@hpl.hp.com> | 2006-12-07 02:14:01 +0100 |
|---|---|---|
| committer | Andi Kleen <andi@basil.nowhere.org> | 2006-12-07 02:14:01 +0100 |
| commit | 36b2a8d5aff4cb3ee83d5e40447a8f073bcfe2fb (patch) | |
| tree | a7883c46dcc89ac79474ff4717ec923043adfd2f /arch/x86_64 | |
| parent | bd1d599518bf11992cc6d5b0df08da4a2b7b0db5 (diff) | |
| download | linux-next-36b2a8d5aff4cb3ee83d5e40447a8f073bcfe2fb.tar.gz | |
[PATCH] x86-64: add X86_FEATURE_PEBS and detection
Here is a patch (used by perfmon2) to detect the presence of the
Precise Event Based Sampling (PEBS) feature for Intel 64-bit processors.
The patch also adds the cpu_has_pebs macro.
changelog:
- adds X86_FEATURE_PEBS
- adds cpu_has_pebs to test for X86_FEATURE_PEBS
Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/x86_64')
| -rw-r--r-- | arch/x86_64/kernel/setup.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index fc944b5e8f4a..619af2e2fa26 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c @@ -835,6 +835,13 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability); } + if (cpu_has_ds) { + unsigned int l1, l2; + rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); + if (!(l1 & (1<<12))) + set_bit(X86_FEATURE_PEBS, c->x86_capability); + } + n = c->extended_cpuid_level; if (n >= 0x80000008) { unsigned eax = cpuid_eax(0x80000008); |