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| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2019-08-16 12:41:48 -0700 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-11-11 14:53:01 +0100 |
| commit | d64422d93dca8fb630a132b0c24680c82c51788b (patch) | |
| tree | 9c9329d84aca84da8ac61e8c8dc445ee84a1dab9 /drivers/clk/tegra/clk-pll-out.c | |
| parent | 05308d7e7bbc932025f1dafc401c73ce83c6f414 (diff) | |
| download | linux-next-d64422d93dca8fb630a132b0c24680c82c51788b.tar.gz | |
clk: tegra: divider: Save and restore divider rate
This patch implements context restore for clock divider.
During system suspend, core power goes off and looses the settings
of the Tegra CAR controller registers.
So on resume, clock dividers are restored back for normal operation.
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-pll-out.c')
0 files changed, 0 insertions, 0 deletions