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| author | Benoît Thébaudeau <benoit@wsystem.com> | 2017-05-30 11:14:08 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-06-20 10:30:32 +0200 |
| commit | cbb4509374963bea440c15ff26e2501d15e7927a (patch) | |
| tree | 6c6361184aac4a6002c400ee850321a6f2584431 /drivers/mmc | |
| parent | d04f8d5b949d972918ef8174d7702275ff6dbb08 (diff) | |
| download | linux-next-cbb4509374963bea440c15ff26e2501d15e7927a.tar.gz | |
mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR
The eSDHC can only DMA from 32-bit-aligned addresses.
This fixes the following test cases of mmc_test:
11: Badly aligned write
12: Badly aligned read
13: Badly aligned multi-block write
14: Badly aligned multi-block read
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index c4bbd7485987..e7893f21b65e 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -19,6 +19,7 @@ */ #define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \ + SDHCI_QUIRK_32BIT_DMA_ADDR | \ SDHCI_QUIRK_NO_BUSY_IRQ | \ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \ SDHCI_QUIRK_PIO_NEEDS_DELAY | \ |