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authorTomasz Figa <tomasz.figa@gmail.com>2013-03-18 22:31:55 +0100
committerLinus Walleij <linus.walleij@linaro.org>2013-04-09 09:45:10 +0200
commit61dd726131777017348b70bd8576b42994a8ffa2 (patch)
treeba4396e6c150983cb8180882174e956807c21f04 /drivers/pinctrl/pinctrl-samsung.h
parentc16150d846585d27e90795447ecc7c055d90f6d5 (diff)
downloadlinux-next-61dd726131777017348b70bd8576b42994a8ffa2.tar.gz
pinctrl: Add pinctrl-s3c64xx driver
This patch adds pinctrl-s3c64xx driver which implements pin control interface for Samsung S3C64xx SoCs. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-samsung.h')
-rw-r--r--drivers/pinctrl/pinctrl-samsung.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h
index 9efeee862e0d..45f27b41e30c 100644
--- a/drivers/pinctrl/pinctrl-samsung.h
+++ b/drivers/pinctrl/pinctrl-samsung.h
@@ -117,7 +117,9 @@ struct samsung_pin_bank_type {
* @pctl_offset: starting offset of the pin-bank registers.
* @pin_base: starting pin number of the bank.
* @nr_pins: number of pins included in this bank.
+ * @eint_func: function to set in CON register to configure pin as EINT.
* @eint_type: type of the external interrupt supported by the bank.
+ * @eint_mask: bit mask of pins which support EINT function.
* @name: name to be prefixed for each pin in this pin bank.
* @of_node: OF node of the bank.
* @drvdata: link to controller driver data
@@ -131,7 +133,9 @@ struct samsung_pin_bank {
u32 pctl_offset;
u32 pin_base;
u8 nr_pins;
+ u8 eint_func;
enum eint_type eint_type;
+ u32 eint_mask;
u32 eint_offset;
char *name;
struct device_node *of_node;
@@ -240,5 +244,6 @@ struct samsung_pmx_func {
/* list of all exported SoC specific data */
extern struct samsung_pin_ctrl exynos4210_pin_ctrl[];
extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[];
+extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[];
#endif /* __PINCTRL_SAMSUNG_H */