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| author | Stephen Warren <swarren@nvidia.com> | 2015-02-24 14:00:49 -0700 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-03-09 18:10:58 +0100 |
| commit | ea623061930ccf6d37b4a09a4e65a26fcf552c22 (patch) | |
| tree | 9f0b8b54e1eeb73aced4ae5ce25c4a53699a9fff /drivers/pinctrl/pinctrl-tegra20.c | |
| parent | 8d4684b39b5865ef5471a256adfcd8d7c3e18d43 (diff) | |
| download | linux-next-ea623061930ccf6d37b4a09a4e65a26fcf552c22.tar.gz | |
pinctrl: tegra: some bits move between registers
Some of the pinmux configuration bits that exist in "drive group"
registers in Tegra30..Tegra124 move to the "pinmux" registers on future
chips. Add a flag to support this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra20.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-tegra20.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra20.c b/drivers/pinctrl/pinctrl-tegra20.c index d3a5722e4acb..4833db4433d9 100644 --- a/drivers/pinctrl/pinctrl-tegra20.c +++ b/drivers/pinctrl/pinctrl-tegra20.c @@ -2221,6 +2221,9 @@ static const struct tegra_pinctrl_soc_data tegra20_pinctrl = { .nfunctions = ARRAY_SIZE(tegra20_functions), .groups = tegra20_groups, .ngroups = ARRAY_SIZE(tegra20_groups), + .hsm_in_mux = false, + .schmitt_in_mux = false, + .drvtype_in_mux = false, }; static int tegra20_pinctrl_probe(struct platform_device *pdev) |