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author | Dmitry Torokhov <dtor_core@ameritech.net> | 2005-09-09 20:14:47 -0500 |
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committer | Dmitry Torokhov <dtor_core@ameritech.net> | 2005-09-09 20:14:47 -0500 |
commit | d344c5e0856ad03278d8700b503762dbc8b86e12 (patch) | |
tree | a6d893a643470a3c2580a58f3228a55fa1fd1d82 /include/asm-i386/msr.h | |
parent | 010988e888a0abbe7118635c1b33d049caae6b29 (diff) | |
parent | 87fc767b832ef5a681a0ff9d203c3289bc3be2bf (diff) | |
download | linux-next-d344c5e0856ad03278d8700b503762dbc8b86e12.tar.gz |
Manual merge with Linus
Diffstat (limited to 'include/asm-i386/msr.h')
-rw-r--r-- | include/asm-i386/msr.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h index c76fce8badbb..62b76cd96957 100644 --- a/include/asm-i386/msr.h +++ b/include/asm-i386/msr.h @@ -47,6 +47,21 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\ ret__; }) +/* rdmsr with exception handling */ +#define rdmsr_safe(msr,a,b) ({ int ret__; \ + asm volatile("2: rdmsr ; xorl %0,%0\n" \ + "1:\n\t" \ + ".section .fixup,\"ax\"\n\t" \ + "3: movl %4,%0 ; jmp 1b\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n\t" \ + " .long 2b,3b\n\t" \ + ".previous" \ + : "=r" (ret__), "=a" (*(a)), "=d" (*(b)) \ + : "c" (msr), "i" (-EFAULT));\ + ret__; }) + #define rdtsc(low,high) \ __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) |