diff options
| author | Zachary Amsden <zach@vmware.com> | 2005-09-03 15:56:36 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@evo.osdl.org> | 2005-09-05 00:06:11 -0700 |
| commit | 4bb0d3ec3e5b1e9e2399cdc641b3b6521ac9cdaa (patch) | |
| tree | 5e8d7646f5c6a2cec990b6d591f230d496b20664 /include/asm-i386/processor.h | |
| parent | 2a0694d15d55d0deed928786a6393d5e45e37d76 (diff) | |
| download | linux-next-4bb0d3ec3e5b1e9e2399cdc641b3b6521ac9cdaa.tar.gz | |
[PATCH] i386: inline asm cleanup
i386 Inline asm cleanup. Use cr/dr accessor functions.
Also, a potential bugfix. Also, some CR accessors really should be volatile.
Reads from CR0 (numeric state may change in an exception handler), writes to
CR4 (flipping CR4.TSD) and reads from CR2 (page fault) prevent instruction
re-ordering. I did not add memory clobber to CR3 / CR4 / CR0 updates, as it
was not there to begin with, and in no case should kernel memory be clobbered,
except when doing a TLB flush, which already has memory clobber.
I noticed that page invalidation does not have a memory clobber. I can't find
a bug as a result, but there is definitely a potential for a bug here:
#define __flush_tlb_single(addr) \
__asm__ __volatile__("invlpg %0": :"m" (*(char *) addr))
Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/processor.h')
| -rw-r--r-- | include/asm-i386/processor.h | 22 |
1 files changed, 9 insertions, 13 deletions
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index d0d8b0160090..7e17d3b4f65a 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h @@ -203,9 +203,7 @@ static inline unsigned int cpuid_edx(unsigned int op) return edx; } -#define load_cr3(pgdir) \ - asm volatile("movl %0,%%cr3": :"r" (__pa(pgdir))) - +#define load_cr3(pgdir) write_cr3(__pa(pgdir)) /* * Intel CPU features in CR4 @@ -232,22 +230,20 @@ extern unsigned long mmu_cr4_features; static inline void set_in_cr4 (unsigned long mask) { + unsigned cr4; mmu_cr4_features |= mask; - __asm__("movl %%cr4,%%eax\n\t" - "orl %0,%%eax\n\t" - "movl %%eax,%%cr4\n" - : : "irg" (mask) - :"ax"); + cr4 = read_cr4(); + cr4 |= mask; + write_cr4(cr4); } static inline void clear_in_cr4 (unsigned long mask) { + unsigned cr4; mmu_cr4_features &= ~mask; - __asm__("movl %%cr4,%%eax\n\t" - "andl %0,%%eax\n\t" - "movl %%eax,%%cr4\n" - : : "irg" (~mask) - :"ax"); + cr4 = read_cr4(); + cr4 &= ~mask; + write_cr4(cr4); } /* |