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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-04-27 09:20:51 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-04-27 09:20:51 -0700 |
commit | ad5da3cf39a5b11a198929be1f2644e17ecd767e (patch) | |
tree | 22d98f2a14db70e7229ec3b9c944488f2d50d4a1 /include/asm-mips/sibyte/bcm1480_int.h | |
parent | da8ac5e0fab11d0e84be4e49aaaa828c52d17097 (diff) | |
parent | 14cf232ab161ce87ca538af3daad5f717c20d487 (diff) | |
download | linux-next-ad5da3cf39a5b11a198929be1f2644e17ecd767e.tar.gz |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (22 commits)
[MIPS] Don't force frame pointers for lockdep on MIPS
[MIPS] update vr41xx Kconfig
[MIPS] remove 2 select entries for VR41xx
[MIPS] rename VR41XX to VR4100 series
[MIPS] Use DEFINE_SPINLOCK instead of SPIN_LOCK_UNLOCKED.
[MIPS] Replace old fashioned "__typeof" with "__typeof__".
[MIPS] Remove unused _THREAD_SIZE_ORDER from asm-offset.c.
[MIPS] Change PCI host bridge setup/resources
[MIPS] Register PCI host bridge resource earlier
[MIPS] Remove pnx8550-v2pci_defconfig
[MIPS] Add bcm1480 ZBus trace support, fix wait related bugs
[MIPS] Updated Sibyte headers
[MIPS] Remove unused argument from kunmap_coherent().
[MIPS] Malta: Delete unused prototype of mips_timer_interrupt.
[MIPS] Select ZONE_DMA only if GENERIC_ISA_DMA selected
[MIPS] MIPS Tech: Get rid of volatile in core code.
[MIPS] IP22: Get rid of volatile in IP22 core code.
[MIPS] JMR3927 cleanup
[MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routines
[MIPS] Cobalt: Split PCI codes from setup.c
...
Diffstat (limited to 'include/asm-mips/sibyte/bcm1480_int.h')
-rw-r--r-- | include/asm-mips/sibyte/bcm1480_int.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-mips/sibyte/bcm1480_int.h b/include/asm-mips/sibyte/bcm1480_int.h index 42d4cf00efd3..c0d5206020fd 100644 --- a/include/asm-mips/sibyte/bcm1480_int.h +++ b/include/asm-mips/sibyte/bcm1480_int.h @@ -157,6 +157,7 @@ * Mask values for each interrupt */ +#define _BCM1480_INT_MASK(w,n) _SB_MAKEMASK(w,((n) & 0x3F)) #define _BCM1480_INT_MASK1(n) _SB_MAKEMASK1(((n) & 0x3F)) #define _BCM1480_INT_OFFSET(n) (((n) & 0x40) << 6) @@ -195,6 +196,7 @@ #define M_BCM1480_INT_PMI_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH) #define M_BCM1480_INT_PMO_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW) #define M_BCM1480_INT_PMO_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH) +#define M_BCM1480_INT_MBOX_ALL _BCM1480_INT_MASK(8,K_BCM1480_INT_MBOX_0_0) #define M_BCM1480_INT_MBOX_0_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0) #define M_BCM1480_INT_MBOX_0_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1) #define M_BCM1480_INT_MBOX_0_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2) |