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authorChris Wilson <chris@chris-wilson.co.uk>2016-06-10 14:22:59 +0530
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-06-13 10:03:54 +0100
commitd6473f566417a507b9ea5b0fc44ff26d930d0e5d (patch)
tree59ddad85437028331a4496c8df8957f50f11d2e7 /include/drm/intel-gtt.h
parent4e50f79622716b444b5b07d3d1b5870fe1794e24 (diff)
downloadlinux-next-d6473f566417a507b9ea5b0fc44ff26d930d0e5d.tar.gz
drm/i915: Add support for mapping an object page by page
Introduced a new vm specfic callback insert_page() to program a single pte in ggtt or ppgtt. This allows us to map a single page in to the mappable aperture space. This can be iterated over to access the whole object by using space as meagre as page size. v2: Added low level rpm assertions to insert_page routines (Chris) v3: Added POSTING_READ post register write (Tvrtko) v4: Rebase (Ankit) v5: Removed wmb() and FLUSH_CTL from insert_page, caller to take care of it (Chris) v6: insert_page not working correctly without FLSH_CNTL write, added the write again. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ankitprasad Sharma <ankitprasad.r.sharma@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'include/drm/intel-gtt.h')
-rw-r--r--include/drm/intel-gtt.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 9e9bddaa58a5..f49edecd66a3 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -13,6 +13,9 @@ void intel_gmch_remove(void);
bool intel_enable_gtt(void);
void intel_gtt_chipset_flush(void);
+void intel_gtt_insert_page(dma_addr_t addr,
+ unsigned int pg,
+ unsigned int flags);
void intel_gtt_insert_sg_entries(struct sg_table *st,
unsigned int pg_start,
unsigned int flags);