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authorZhao Qiang <qiang.zhao@nxp.com>2016-06-06 14:30:02 +0800
committerDavid S. Miller <davem@davemloft.net>2016-06-07 15:56:31 -0700
commitc19b6d246a35627c3a69b2fa6bdece212b48214b (patch)
treec7f5748156aed7f2f2c0eb0e33eab1f7ef23e172 /include/soc/fsl/qe/qe.h
parent35ef1c20fdb26779b6c3c4fd74bbdd5028e70005 (diff)
downloadlinux-next-c19b6d246a35627c3a69b2fa6bdece212b48214b.tar.gz
drivers/net: support hdlc function for QE-UCC
The driver add hdlc support for Freescale QUICC Engine. It support NMSI and TSA mode. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/soc/fsl/qe/qe.h')
-rw-r--r--include/soc/fsl/qe/qe.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/soc/fsl/qe/qe.h b/include/soc/fsl/qe/qe.h
index c3b1dc8a21a7..70339d7958c0 100644
--- a/include/soc/fsl/qe/qe.h
+++ b/include/soc/fsl/qe/qe.h
@@ -657,6 +657,7 @@ struct ucc_slow_pram {
#define UCC_SLOW_GUMR_L_MODE_QMC 0x00000002
/* General UCC FAST Mode Register */
+#define UCC_FAST_GUMR_LOOPBACK 0x40000000
#define UCC_FAST_GUMR_TCI 0x20000000
#define UCC_FAST_GUMR_TRX 0x10000000
#define UCC_FAST_GUMR_TTX 0x08000000