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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-21 17:25:20 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 12:27:45 +0200 |
| commit | 29db30c45f07c929c86c40a5b85f18b69c89c638 (patch) | |
| tree | 3da00d1cd8ce3cf20150f501dcdfa8b57e63dcbf /mm/hugetlb_vmemmap.c | |
| parent | 9d18f81b35355f63a39b04869d0a013194925d1a (diff) | |
| download | linux-next-29db30c45f07c929c86c40a5b85f18b69c89c638.tar.gz | |
clk: renesas: rzg2l: Simplify multiplication/shift logic
"a * (1 << b)" == "a << b".
No change in generated code.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/71e1cf2e30fb2d7966fc8ec6bab23eb7e24aa1c4.1645460687.git.geert+renesas@glider.be
Diffstat (limited to 'mm/hugetlb_vmemmap.c')
0 files changed, 0 insertions, 0 deletions