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| author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2018-09-26 17:32:37 +0100 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-10-01 13:08:41 +0100 |
| commit | d2db7773ba864df6b4e19643dfc54838550d8049 (patch) | |
| tree | 3237bdd2eba87ac3c5c112e936e642aac522fb32 /virt/kvm/arm/mmu.c | |
| parent | 6bf4ca7fbc85d80446ac01c0d1d77db4d91a6d84 (diff) | |
| download | linux-next-d2db7773ba864df6b4e19643dfc54838550d8049.tar.gz | |
kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table
So far we have only supported 3 level page table with fixed IPA of
40bits, where PUD is folded. With 4 level page tables, we need
to check if the PUD entry is valid or not. Fix stage2_flush_memslot()
to do this check, before walking down the table.
Acked-by: Christoffer Dall <cdall@kernel.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'virt/kvm/arm/mmu.c')
| -rw-r--r-- | virt/kvm/arm/mmu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c index ed162a6c57c5..ee7ce8fa4a12 100644 --- a/virt/kvm/arm/mmu.c +++ b/virt/kvm/arm/mmu.c @@ -412,7 +412,8 @@ static void stage2_flush_memslot(struct kvm *kvm, pgd = kvm->arch.pgd + stage2_pgd_index(addr); do { next = stage2_pgd_addr_end(addr, end); - stage2_flush_puds(kvm, pgd, addr, next); + if (!stage2_pgd_none(*pgd)) + stage2_flush_puds(kvm, pgd, addr, next); } while (pgd++, addr = next, addr != end); } |