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-rw-r--r--drivers/media/dvb/ttpci/budget-patch.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/media/dvb/ttpci/budget-patch.c b/drivers/media/dvb/ttpci/budget-patch.c
index fc1267b8c892..9a155396d6ac 100644
--- a/drivers/media/dvb/ttpci/budget-patch.c
+++ b/drivers/media/dvb/ttpci/budget-patch.c
@@ -500,14 +500,14 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
/* New design (By Emard)
** this rps1 code will copy internal HS event to GPIO3 pin.
-** GPIO3 is in budget-patch hardware connectd to port B VSYNC
+** GPIO3 is in budget-patch hardware connected to port B VSYNC
** HS is an internal event of 7146, accessible with RPS
** and temporarily raised high every n lines
** (n in defined in the RPS_THRESH1 counter threshold)
** I think HS is raised high on the beginning of the n-th line
** and remains high until this n-th line that triggered
-** it is completely received. When the receiption of n-th line
+** it is completely received. When the reception of n-th line
** ends, HS is lowered.
** To transmit data over DMA, 7146 needs changing state at
@@ -541,7 +541,7 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
** hardware debug note: a working budget card (including budget patch)
** with vpeirq() interrupt setup in mode "0x90" (every 64K) will
** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
-** and that means 3*25=75 Hz of interrupt freqency, as seen by
+** and that means 3*25=75 Hz of interrupt frequency, as seen by
** watch cat /proc/interrupts
**
** If this frequency is 3x lower (and data received in the DMA
@@ -550,7 +550,7 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
** this means VSYNC line is not connected in the hardware.
** (check soldering pcb and pins)
** The same behaviour of missing VSYNC can be duplicated on budget
-** cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
+** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.
*/
// Setup RPS1 "program" (p35)