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* ARM: dts: sun5i: Add touchscreen node to reference-design-tablet.dtsiHans de Goede2016-11-222-24/+39
| | | | | | | | | | | | | | | | Just like on sun8i all sun5i tablets use the same interrupt and power gpios for their touchscreens. I've checked all known a13 fex files and only the UTOO P66 uses a different gpio for the interrupt. Add a touchscreen node to sun5i-reference-design-tablet.dtsi, which fills in the necessary gpios to avoid duplication in the tablet dts files, just like we do in sun8i-reference-design-tablet.dtsi. This will make future patches adding touchscreen nodes to a13 tablets simpler. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sunxi: Add the missing clocks to the pinctrl nodesMaxime Ripard2016-11-227-11/+22
| | | | | | | | | The pin controllers also use the two oscillators for debouncing. Add them to the DTs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTGChen-Yu Tsai2016-11-221-0/+20
| | | | | | | | The Bananapi M1+ supports USB OTG, with the PMIC doing VBUS sensing. Enable the USB OTG related functions. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulatorsChen-Yu Tsai2016-11-221-4/+31
| | | | | | | | | | The Bananapi M1+, like other Allwinner A20 based boards, uses the AXP209 PMIC to supply its power. Add the AXP209 regulators. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun7i: bananapi-m1-plus: Enable USB PHY for USB host supportChen-Yu Tsai2016-11-221-0/+5
| | | | | | | | | | | | | The 2 USB host ports are directly tied to the 2 USB hosts in the SoC. The 2 host pairs were already enabled, but the USB PHY wasn't. VBUS on the 2 ports are always on. Enable the USB PHY. Fixes: 04c85ecad32a ("ARM: dts: sun7i: Add dts file for Bananapi M1 Plus board") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun8i: sina33: Enable USB gadgetMaxime Ripard2016-11-221-0/+5
| | | | | | | | | | | The micro-USB on the SinA33 has a somewhat interesting design in the sense that it has a micro USB connector, but the VBUS is (supposed to be) controlled through an (unpopulated) jumper. Obviously, that doesn't work really well, and only the peripheral mode really works. Still enable it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun8i: reference-design-tablet: ldo_io1 is vcc-touchscreenHans de Goede2016-11-222-7/+7
| | | | | | | | | | | | On some Q8 and other tablets ldo_io1 is used as vcc-touchscreen, config at as such in sun8i-reference-design-tablet.dtsi. Note that it will only be enabled when it us actually referenced by a foo-supply property in the touchscreen node, so for tablets which do not use ldo_io1 as vcc-touchscreen, it will be disabled. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun8i: replace enable-sdio-wakeup with wakeup-source for BananaPi M1+Sudeep Holla2016-11-221-1/+1
| | | | | | | | | | | | | | | Though the mmc core driver will continue to support the legacy "enable-sdio-wakeup" property to enable SDIO as the wakeup source, "wakeup-source" is the new standard binding. This patch replaces the legacy "enable-sdio-wakeup" with the unified "wakeup-source" property in order to avoid any further copy-paste duplication. Cc: Chen-Yu Tsai <wens@csie.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: gr8: evb: Add i2s codecMaxime Ripard2016-11-221-1/+16
| | | | | | | | The GR8-EVB comes with a wm8978 codec connected to the i2s bus. Add a card in order to have it working Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun6i: sina31s: Enable internal audio codecChen-Yu Tsai2016-11-221-0/+8
| | | | | | | | The SinA31s routes the SoC's LINEOUT pins to a line out jack, and MIC1 to a microphone jack, with MBIAS providing phantom power. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun6i: hummingbird: Enable internal audio codecChen-Yu Tsai2016-11-221-0/+13
| | | | | | | | | | The Hummingbird A31 has headset and line in audio jacks and an onboard mic routed to the pins for the SoC's internal codec. The line out pins are routed to an onboard speaker amp, whose output is available on a pin header. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun6i: Add audio codec device nodeChen-Yu Tsai2016-11-221-0/+13
| | | | | | | | The A31 SoC includes the Allwinner audio codec, capable of 24-bit playback up to 192 kHz and 24-bit capture up to 48 kHz. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: gr8: evb: Enable SPDIFMaxime Ripard2016-11-221-0/+18
| | | | | | | The GR8-EVB has a SPDIF out connector. Enable it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun8i: Add SPI controller node in H3Milo Kim2016-11-221-0/+32
| | | | | | | | | | H3 SPI subsystem is almost same as A31 SPI except buffer size, so those DT properties are reusable. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun8i: Add SPI pinctrl node in H3Milo Kim2016-11-221-0/+14
| | | | | | | | | | H3 supports two SPI controllers. Four pins (MOSI, MISO, SCLK, SS) are configured through the pinctrl subsystem. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun8i: Add dts file for NanoPi M1 SBCMilo Kim2016-11-221-0/+64
| | | | | | | | | | | NanoPi M1 is the Allwinner H3 based board. This patch enables UART for debug console, LEDs, GPIO key switch, 3 USB host ports, a micro SD slot and related power and pin controls by using NanoPi common dtsi file. Cc: James Pettigrew <james@innovum.com.au> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun8i: Use the common file in NanoPi NEO SBCMilo Kim2016-11-221-78/+1
| | | | | | | | NanoPi common dtsi supports all components of NEO SBC, so just include it. Cc: James Pettigrew <james@innovum.com.au> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun8i: Add common dtsi file for NanoPi SBCsMilo Kim2016-11-221-0/+144
| | | | | | | | | | | | | | | This patch provides a common file for NanoPi M1 and Neo SBC. Those have common features below. * UART0 * 2 LEDs * USB host (EHCI3, OHCI3) and PHY * MicroSD * GPIO key switch Cc: James Pettigrew <james@innovum.com.au> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: cubieboard4: Enable AP6330 WiFiChen-Yu Tsai2016-11-221-0/+32
| | | | | | | | | | The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with the enabling pin connected to PL2. The AC100 RTC provides a low power clock signal. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: a80-optimus: Enable AP6330 WiFiChen-Yu Tsai2016-11-221-0/+30
| | | | | | | | | | The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with the enabling pin connected to PL2. The AC100 RTC provides a low power clock signal. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun9i: Add mmc1 pinmux settingChen-Yu Tsai2016-11-221-0/+8
| | | | | | | | On the A80, mmc1 is available on pingroup G. Designs mostly use this to connect to an SDIO WiFi chip. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: chip: Add optional busesMaxime Ripard2016-11-221-0/+14
| | | | | | | | | | The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not explicitly dedicated to anything. Add them to the DTS with the muxing already set, but keep them disabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sun5i: Add RGB 565 LCD pinsMaxime Ripard2016-11-221-0/+10
| | | | | | | Some boards use the LCD in RGB565. Enable the pin muxing option. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sun5i: Add SPI2 pinsMaxime Ripard2016-11-221-0/+14
| | | | | | | | All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sun5i: Rename A10s pinsMaxime Ripard2016-11-222-4/+4
| | | | | | | | | The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename the A10s only bank so that it doesn't confuse people on the other SoCs whose indexing would start at b. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: sun5i: chip: add a node for the w1 gpio controllerAntoine Tenart2016-11-221-0/+14
| | | | | | | | The CHIP uses a 1-Wire bus to discover the DIPs. Enable the bus in the DT. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: chip: Enable Wi-Fi SDIO chipMaxime Ripard2016-11-221-0/+41
| | | | | | | | | The WiFi chip is powered through a GPIO and two regulators in parallel. Since that case is not supported yet, just set them as always on before we rework the regulator framework to deal with those. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: gr8: Add CHIP Pro supportMaxime Ripard2016-11-222-0/+267
| | | | | | | | The CHIP Pro is a small embeddable board. It features a GR8, an AXP209 PMIC, a 512MB SLC NAND and a WiFi/BT chip. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: gr8: Add UART3 pinsMaxime Ripard2016-11-221-0/+14
| | | | | | | The UART3 pins were missing from the DTSI. Add them. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: gr8: Add UART2 pinsMaxime Ripard2016-11-221-0/+14
| | | | | | | The UART2 pins were missing from the DTSI. Add them. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: gr8: Add missing pwm channel 1 pinMaxime Ripard2016-11-221-0/+7
| | | | | | | | The PWM controller has two different channels, but only the first pin was exposed in the DTSI. Add the other one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: gr8: Fix typo in the i2s mclk pin groupMaxime Ripard2016-11-221-1/+1
| | | | | | | There was a dumb copy and paste mistake here, fix it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: gr8: Add the UART3Maxime Ripard2016-11-221-0/+10
| | | | | | | | The GR8 has access to the UART3 controller, which was missing in the DTSI. Add it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun6i: Add A31 LCD0 RGB888 pinsChen-Yu Tsai2016-11-221-0/+13
| | | | | | | | The LCD0 controller on the A31 can do RGB output up to 8 bits per channel. Add the pins for RGB888 output. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun6i: Add device nodes for first display pipelineChen-Yu Tsai2016-11-222-0/+160
| | | | | | | | The A31 has 2 parallel display pipelines, which can be intermixed. However the driver currently only supports one of them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sunxi: Add cpu-supply for Olimex A20 EVBEmmanuel Vadot2016-11-221-0/+4
| | | | | | | | | sun7i-a20-olimex-som-evb.dts doesn't contain cpu-supply needed for voltage-scaling with cpufreq-dt so define it. The default voltages are defined in sun7i-a20.dtsi. Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: sun5i: a13-olinuxino: Enable VGA bridgeMaxime Ripard2016-11-221-0/+54
| | | | | | | | Now that we have support for the VGA bridges using our DRM driver, enable the display engine for the Olimex A13-Olinuxino. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* ARM: dts: sun6i: Sort pinmux setting nodesChen-Yu Tsai2016-11-221-41/+41
| | | | | | | | The pinmux setting nodes for the A31 were added out of alphabetical order. Sort them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: gr8: Rename the DTSI and relevant DTSMaxime Ripard2016-11-223-2/+2
| | | | | | | Reviews have found that sun5i was a better prefix after all for the GR8. Rename the relevant device trees before it's too late. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* ARM: dts: sun8i: fix the pinmux for UART1Icenowy Zheng2016-10-251-0/+4
| | | | | | | | | | | | | | | | When the patch is applied, the allwinner,driver and allwinner,pull properties are removed. Although they're described to be optional in the devicetree binding, without them, the pinmux cannot be initialized, and the uart cannot be used. Add them back to fix the problem, and makes the bluetooth on iNet D978 Rev2 board work. Fixes: 82eec384249f (ARM: dts: sun8i: add pinmux for UART1 at PG) Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* Linux 4.9-rc1v4.9-rc1Linus Torvalds2016-10-151-2/+2
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* Merge tag 'befs-v4.9-rc1' of git://github.com/luisbg/linux-befsLinus Torvalds2016-10-158-283/+244
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull befs fixes from Luis de Bethencourt: "I recently took maintainership of the befs file system [0]. This is the first time I send you a git pull request, so please let me know if all the below is OK. Salah Triki and myself have been cleaning the code and fixing a few small bugs. Sorry I couldn't send this sooner in the merge window, I was waiting to have my GPG key signed by kernel members at ELCE in Berlin a few days ago." [0] https://lkml.org/lkml/2016/7/27/502 * tag 'befs-v4.9-rc1' of git://github.com/luisbg/linux-befs: (39 commits) befs: befs: fix style issues in datastream.c befs: improve documentation in datastream.c befs: fix typos in datastream.c befs: fix typos in btree.c befs: fix style issues in super.c befs: fix comment style befs: add check for ag_shift in superblock befs: dump inode_size superblock information befs: remove unnecessary initialization befs: fix typo in befs_sb_info befs: add flags field to validate superblock state befs: fix typo in befs_find_key befs: remove unused BEFS_BT_PARMATCH fs: befs: remove ret variable fs: befs: remove in vain variable assignment fs: befs: remove unnecessary *befs_sb variable fs: befs: remove useless initialization to zero fs: befs: remove in vain variable assignment fs: befs: Insert NULL inode to dentry fs: befs: Remove useless calls to brelse in befs_find_brun_dblindirect ...
| * befs: befs: fix style issues in datastream.cLuis de Bethencourt2016-10-081-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixing the following checkpatch.pl errors: ERROR: "foo * bar" should be "foo *bar" + befs_blocknr_t blockno, befs_block_run * run); WARNING: Missing a blank line after declarations + struct buffer_head *bh; + befs_debug(sb, "---> %s length: %llu", __func__, len); WARNING: Block comments use * on subsequent lines + /* + Double indir block, plus all the indirect blocks it maps. (and other instances of these) Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
| * befs: improve documentation in datastream.cLuis de Bethencourt2016-10-081-95/+98
| | | | | | | | | | | | | | Convert function descriptions to kernel-doc style. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
| * befs: fix typos in datastream.cLuis de Bethencourt2016-10-081-4/+4
| | | | | | | | | | Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
| * befs: fix typos in btree.cLuis de Bethencourt2016-10-081-4/+3
| | | | | | | | | | | | | | Fixing typos in kernel-doc function descriptions in fs/befs/btree.c. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
| * befs: fix style issues in super.cLuis de Bethencourt2016-10-081-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixing the following checkpatch.pl error: ERROR: "foo * bar" should be "foo *bar" +befs_load_sb(struct super_block *sb, befs_super_block * disk_sb) And the following warnings: WARNING: suspect code indent for conditional statements (8, 12) + if (disk_sb->fs_byte_order == BEFS_BYTEORDER_NATIVE_LE) + befs_sb->byte_order = BEFS_BYTESEX_LE; WARNING: suspect code indent for conditional statements (8, 12) + else if (disk_sb->fs_byte_order == BEFS_BYTEORDER_NATIVE_BE) + befs_sb->byte_order = BEFS_BYTESEX_BE; WARNING: break quoted strings at a space character + befs_error(sb, "blocksize(%u) cannot be larger" + "than system pagesize(%lu)", befs_sb->block_size, WARNING: line over 80 characters + if (befs_sb->log_start != befs_sb->log_end || befs_sb->flags == BEFS_DIRTY) { Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
| * befs: fix comment styleLuis de Bethencourt2016-10-081-7/+3
| | | | | | | | | | | | | | | | | | | | | | The description of befs_load_sb was confusing the kernel-doc system since, because it starts with /**, it thinks it will document the function with kernel-doc formatting. Which it isn't. Fix other comment style issues in the file while we are at it. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
| * befs: add check for ag_shift in superblockLuis de Bethencourt2016-10-081-0/+7
| | | | | | | | | | | | | | | | | | | | | | ag_shift and blocks_per_ag contain the same information in different ways, same as block_shift and block_size do. It is worth checking this two are consistent, but since blocks_per_ag isn't documented as mandatory to use some implementations of befs don't enforce this, so making it non-fatal if they don't match and just having it as a warning. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
| * befs: dump inode_size superblock informationLuis de Bethencourt2016-10-081-0/+1
| | | | | | | | | | | | | | | | | | befs_dump_super_block() wasn't giving the inode_size information when dumping all elements of the superblock. Add this element to have complete information of the superblock. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Salah Triki <salah.triki@gmail.com>
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