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* pinctrl: abx500: fix abx500_gpio_get()Patrice Chotard2013-06-241-2/+15
| | | | | | | | | - allow to get output GPIO value - as there is no GPIO0 on ABX500, use correct offset with abx500_gpio_get_bit() Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: abx500: fix abx500_pin_config_set()Patrice Chotard2013-06-241-6/+25
| | | | | | | | | | | - Update abx500_pin_config_set() in order to take in account PIN_CONFIG_BIAS_DISABLE state to disable pull up or pull down. - Rework error path. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: abx500: Add device tree supportPatrice Chotard2013-06-242-0/+536
| | | | | | | | | | | We use the same way to define pin muxing and pin configuration than for nomadik. So pickup code from pinctrl_nomadik.c to be able to implement pin multiplexing and pin configuration using the device tree. Pin configuration uses generic parsing code. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Guard DT parsing with #ifdef CONFIG_OFLaurent Pinchart2013-06-241-0/+4
| | | | | | | | | | | | | | Fix a compilation error caused by pinconf_generic_parse_dt_config() not being defined on !CONFIG_OF platforms by guarding the whole DT node parsing code with #ifdef CONFIG_OF. Defining a pinconf_generic_parse_dt_config() on !CONFIG_OF would have been possible as well, but would have resulted in a larger code size on !CONFIG_OF platforms (such as arch/sh). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add Intel BayTrail GPIO/pinctrl supportMathias Nyman2013-06-183-0/+556
| | | | | | | | | | | | | Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins. Supports gpio interrupts and ACPI gpio events Pins may be muxed to alternate function instead of gpio by firmware. This driver does not touch the pin muxing and expect firmare to set pin muxing and pullup/down properties properly. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldocJames Hogan2013-06-181-1/+1
| | | | | | | | | | The kerneldoc comment for struct pinconf_ops was missing pin_config_dbg_parse_modify, and instead described pin_config_group_dbg_set (which is presumably an old name for the same function). Rename it in the kerneldoc comment so they match. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Staticize local symbolsSachin Kamat2013-06-181-2/+2
| | | | | | | | Symbols referenced only in this file are made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: spear/plgpio: Staticize spear310_o2pSachin Kamat2013-06-181-1/+1
| | | | | | | | 'spear310_o2p' is referenced only in this file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: Staticize local symbolsSachin Kamat2013-06-181-3/+3
| | | | | | | Some symbols referenced only in this file are made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: bcm2835: Staticize bcm2835_gpio_pinsSachin Kamat2013-06-181-1/+1
| | | | | | | | 'bcm2835_gpio_pins' is used only in this file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Add pinconf support to DT bindingsLaurent Pinchart2013-06-182-21/+124
| | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Add DT supportLaurent Pinchart2013-06-183-1/+314
| | | | | | | | | | | | | Support device instantiation through the device tree. The compatible property is used to select the SoC pinmux information. Set the gpio_chip device field to the PFC device to enable automatic GPIO OF support. Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* sh-pfc: Remove support for platform dataLaurent Pinchart2013-06-181-2/+1
| | | | | | | | Platform data isn't used, support can thus be removed. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: core: fix missing unlock on error in pinctrl_find_gpio_range_from_pin()Wei Yongjun2013-06-181-8/+7
| | | | | | | | | | | Add the missing unlock before return from function pinctrl_find_gpio_range_from_pin() in the error handling case. Introduced by commit 2ff3477efd7086544b9e298fc63afab0645921b4. (pinctrl: add pin list based GPIO ranges) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: exynos: ack level-triggered interrupts before unmaskingDoug Anderson2013-06-171-0/+22
| | | | | | | | | | | | A level-triggered interrupt should be acked after the interrupt line becomes inactive and before it is unmasked, or else another interrupt will be immediately triggered. Acking before or after calling the handler is not enough. Signed-off-by: Luigi Semenzato <semenzato@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* MAINTAINERS: Add Samsung pinctrl entriesDoug Anderson2013-06-171-0/+10
| | | | | | | | | | | It's convenient if get_maintainer suggests sending samsung/exynos pinctrl changes to linux-samsung-soc and to Tomasz and Thomas. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: export pinctrl_pm_select_*_stateArnd Bergmann2013-06-171-1/+3
| | | | | | | | | | The three functions pinctrl_pm_select_default_state, pinctrl_pm_select_sleep_state, and pinctrl_pm_select_idle_state are used in drivers that can be loadable modules, and should be exported. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: rockchip: correctly handle arguments of pinconf optionsHeiko Stübner2013-06-171-4/+37
| | | | | | | | | | Change the rockchip pinctrl driver to handle the arguments to the pull pinconfig options correctly. So only accept non-0 values for the pull options as the rockchip pin-controller can only turn pulls on and off (this via BIAS_DISABLE). Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: single: adopt pinctrl sleep mode managementHebbar Gururaja2013-06-171-0/+27
| | | | | | | | | Make pinctrl-single able to handle suspend/resume events and change hogged pins states accordingly. Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* spi: pl022: remove unused ret and pins_state variablesFabio Baltieri2013-06-171-5/+0
| | | | | | | | | | | | | | | | | | Removes the warnings: drivers/spi/spi-pl022.c: In function 'pl022_suspend_resources': drivers/spi/spi-pl022.c:2322:24: warning: unused variable 'pins_state' [-Wunused-variable] drivers/spi/spi-pl022.c:2321:6: warning: unused variable 'ret' [-Wunused-variable] drivers/spi/spi-pl022.c: In function 'pl022_resume_resources': drivers/spi/spi-pl022.c:2334:6: warning: unused variable 'ret' [-Wunused-variable] introduced in: f1c9cf0 spi: pl022: use pinctrl PM helpers Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Acked-by: Mark Brown <broonie@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Add Allwinner A10s pinsMaxime Ripard2013-06-172-0/+646
| | | | | Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Move the pins definitions to a separate headerMaxime Ripard2013-06-172-1360/+1379
| | | | | | | | | It will allow us to have a cleaner separation between the data needed by the driver to work, and the core logic of the driver in itself, and will allow having too much noise in the core driver in the future. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: establish pull-up/pull-down terminologyLinus Walleij2013-06-171-6/+7
| | | | | | | | | | | | | | | It is counter-intuitive to have "0" mean disable in a boolean manner for electronic properties of pins such as pull-up and pull-down. Therefore, define that a pull-up/pull-down argument of 0 to such a generic option means that the pin is short-circuited to VDD or GROUND. Pull disablement shall be done using PIN_CONFIG_BIAS_DISABLE. Cc: James Hogan <james.hogan@imgtec.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by Heiko Stuebner <heiko@sntech.de> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: dynamically alloc temp array when parsing dt pinconf optionsHeiko Stübner2013-06-171-6/+18
| | | | | | | | | | | Allocating the temorary array in pinconf_generic_parse_dt_config on stack might cause problems later on, when the number of options grows over time. Therefore also allocate this array dynamically to be on the safe side. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: handle zero found dt pinconfig properties betterHeiko Stübner2013-06-171-0/+7
| | | | | | | | | | This adds a shortcut when no valid pinconf properties are found in the parsed dt node, to set the values immediately and return. Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: clarify some dt pinconfig optionsHeiko Stübner2013-06-172-5/+26
| | | | | | | | | | | | | | The bias-pull-* options use values > 0 to indicate that the pull should be activated and optionally also indicate the strength of the pull. Therefore use an default value of 1 for these options. Split the low-power-mode option into low-power-enable and -disable. Update the documentation to describe the param arguments better. Reported-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Fix comment on pinctrl_gpio_range.pin_baseChristian Ruppert2013-06-171-1/+1
| | | | | | | | | The comment introduced with the recently added pinctrl_gpio_range.pins element was wrong. This corrects it. Thanks to Patrice Chotard for pointing this out. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: update GPIO range docLinus Walleij2013-06-171-3/+21
| | | | | | | | | This updates the GPIO range documentation with the API changes for sparse/random/arbitrary pin-to-GPIO mappings. Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com> Acked-by: Rob Landley <rob@landley.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: move the pm state stubsLinus Walleij2013-06-171-15/+15
| | | | | | | | | The stubs for the !PINCTRL case were placed in the wrong part of the file, causing breakage in linux-next when compiling SH without pinctrl. Fix it up by moving the stubs to the right place. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add pin list based GPIO rangesChristian Ruppert2013-06-172-11/+52
| | | | | | | | | Traditionally, GPIO ranges are based on consecutive ranges of both GPIO and pin numbers. This patch allows for GPIO ranges with arbitrary lists of pin numbers. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: exynos: reorder xyz_irq_unmask() so future patch can ackDoug Anderson2013-06-161-26/+26
| | | | | | | | | | This patch does nothing but reorder the functions to improve the readability of a future patch. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: exynos: Add spinlocks to irq_mask and irq_unmaskDoug Anderson2013-06-161-0/+20
| | | | | | | | | | | | | | The patch: 1984695 pinctrl: samsung: Protect bank registers with a spinlock ...added spinlocks to protect many accesses. However, the irq_mask and irq_unmask functions still do an unprotected read/modify/write. Add the spinlock there. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: abx500: fix build warningPatrice Chotard2013-06-161-1/+1
| | | | | | | | | pinctrl-abx500.c: In function 'abx500_gpio_dbg_show_one': pinctrl-abx500.c:534:14: warning: 'pud' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add pinctrl driver for Rockchip SoCsHeiko Stübner2013-06-165-0/+1496
| | | | | | | | | | | | | | | This driver adds support the Cortex-A9 based SoCs from Rockchip, so at least the RK2928, RK3066 (a and b) and RK3188. Earlier Rockchip SoCs seem to use similar mechanics for gpio handling so should be supportable with relative small changes. Pull handling on the rk3188 is currently a stub, due to it being a bit different to the earlier SoCs. Pinmuxing as well as gpio (and interrupt-) handling tested on a rk3066a based machine. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add function to parse generic pinconfig properties from a dt nodeHeiko Stübner2013-06-163-0/+125
| | | | | | | | | | | | pinconf_generic_parse_dt_config() takes a node as input and generates an array of generic pinconfig values from the properties of this node. As I couldn't find a mechanism to count the number of properties of a node the function uses internally an array to accept one of parameter and copies the real present options to a smaller variable at its end. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* drivers: net: davinci_mdio: use pinctrl PM helpersMugunthan V N2013-06-161-0/+10
| | | | | | | | | This utilize the new pinctrl core PM helpers to transition the driver to "default" and "sleep" states. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* drivers: net: cpsw: use pinctrl PM helpersMugunthan V N2013-06-161-0/+11
| | | | | | | | | This utilize the new pinctrl core PM helpers to transition the driver to "default" and "sleep" states. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* spi: pl022: use pinctrl PM helpersLinus Walleij2013-06-161-57/+8
| | | | | | | | | | | | | | | This utilize the new pinctrl core PM helpers to transition the driver to "sleep" and "idle" states, cutting away some boilerplate code. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Wolfram Sang <wsa@the-dreams.de> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Add external interrupt functionsMaxime Ripard2013-06-161-26/+73
| | | | | | | | | The A10 and A13 has a few pins that can be muxed into a particular function that can be used as an interrupt source. Add the available pins for such functions to the A10 and A13 description array. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Add external interrupts supportMaxime Ripard2013-06-162-0/+223
| | | | | | | | | | | | | | | | The port controller IP found in the Allwinner A10 and A13 can use few of the pins it manage as an interrupt source, called external interrupts in the datasheet. The number of these external interrupts are SoCs specific, but the current upper limit is 32. In order to work, the external interrupts' pins have to be muxed to a specific function to generate an interrupt. This patch adds the irqchip and the needed logic to use the PIO controller as an interrupt controller. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Search the description array by pin idMaxime Ripard2013-06-161-21/+29
| | | | | | | | Avoid to use expensive string manipulation functions and search by pin id when possible. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: exynos5440: fix issues reported by prevent toolThomas Abraham2013-06-161-5/+8
| | | | | | | | | This patch fixes issues reported by prevent tool. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> [Drop hunk already in-tree from a patch by Wei Yongjun] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: pin names for pinctrl-single.bitsManjunathappa, Prakash2013-06-161-5/+10
| | | | | | | | | | | Take care to name pin names as register-offset.bit-pos-of-pin-in-register in case configuring multiple pins in register. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinctrl-single: enhance to configure multiple pins of different modulesManjunathappa, Prakash2013-06-162-34/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to configure multiple pins in each register, existing implementation added by [1] does not support full fledge multiple pin configuration in single register, reports a pin clash when different modules configure different bits of same register. The issue reported and discussed here http://www.spinics.net/lists/arm-kernel/msg235213.html With pinctrl-single,bits-per-mux property specified, use function-mask property to find out number pins to configure. Allocate and register pin control functions based sub mask. Tested on da850/omap-l138 EVM. does not support variable submask for pins. does not support pinconf. [1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux" (9e605cb68a21d5704839a192a46ebcf387773704), Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Reported-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Tested-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* i2c: nomadik: use pinctrl PM helpersLinus Walleij2013-06-161-80/+10
| | | | | | | | | | | | | | | This utilize the new pinctrl core PM helpers to transition the driver to "sleep" and "idle" states, cutting away some boilerplate code. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Mark Brown <broonie@kernel.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* tty: serial: modify PL011 driver to use pinctrl PM helpersLinus Walleij2013-06-161-39/+3
| | | | | | | | | | | | | | | This augments the PL011 UART driver to utilize the new pinctrl core PM helpers to transition the driver to default and sleep states, cutting away some boilerplate code. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Mark Brown <broonie@kernel.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* drivers: pinctrl sleep and idle states in the coreLinus Walleij2013-06-164-0/+118
| | | | | | | | | | | | | | | | | | | | | | | If a device have sleep and idle states in addition to the default state, look up these in the core and stash them in the pinctrl state container. Add accessor functions for pinctrl consumers to put the pins into "default", "sleep" and "idle" states passing nothing but the struct device * affected. Solution suggested by Kevin Hilman, Mark Brown and Dmitry Torokhov in response to a patch series from Hebbar Gururaja. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add pinconf-generic define for a pin-default pullHeiko Stübner2013-06-162-0/+7
| | | | | | | | | | | | | | | There exist controllers that don't support to set the pull to up or down separately but instead automatically set the pull direction based on embedded knowledge inside the controller, for example depending on the selected mux function of the pin. Therefore this patch adds another config option to use this default pull-state for a pin where it is not possible to know or decide if the pin will be pulled up or down. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add VF610 pinctrl driverJingchang Lu2013-06-164-0/+388
| | | | | | | | | Adds Freescale Vybrid VF610 pin controller driver to IMX common pinctrl driver framework. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: add VF610 support to imx pinctrl frameworkJingchang Lu2013-06-162-11/+46
| | | | | | | | | | | On some platforms such as VF610, offset of mux and pad ctrl register may be zero, and the mux_mode and config_val are in one 32-bit register. This patch adds support to imx core pinctrl framework to handle these cases. Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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