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* ARM: dts: renesas: #sound-dai-cells is used when simple-cardKuninori Morimoto2023-01-261-1/+1
| | | | | | | | | | | Current sound comment is indicating that #sound-dai-cells is required, but it is needed only if the board is using "simple-card". Hence tidy up the comments. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/87edrzi41e.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: renesas: Miscellaneous whitespace fixesGeert Uytterhoeven2022-10-281-1/+1
| | | | | | | Remove superfluous spaces near properties and equal signs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1666adade07e16b77af1f03c55799b2ad1378e60.1666605877.git.geert+renesas@glider.be
* ARM: dts: renesas: Fix USB PHY device and child node namesGeert Uytterhoeven2022-09-191-3/+3
| | | | | | | | | | | | | | | | | make dtbs_check: usb-phy@e6590100: '#phy-cells' is a required property From schema: dtschema/schemas/phy/phy-provider.yaml The R-Car Gen2 USB PHY device nodes do not represent USB PHYs theirselves, and thus do not have "#phy-cells" properties. Fix the warning by renaming them from "usb-phy" to "usb-phy-controller". Rename their child nodes from "usb-channel" to "usb-phy", as these do represent USB PHYs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/6442b4042e26537abc8632c4772f8201685f1f1f.1663165098.git.geert+renesas@glider.be
* ARM: dts: rcar-gen2: Add interrupt properties to watchdog nodesWolfram Sang2022-04-131-0/+1
| | | | | | | | Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: renesas: Move enable-method to CPU nodesGeert Uytterhoeven2021-05-251-1/+2
| | | | | | | | | | | | | | | | | | | According to Documentation/devicetree/bindings/arm/cpus.yaml, the "enable-method" property should be a property of the individual CPU nodes, and not of the parent "cpus" container node. However, on R-Car Gen2 and RZ/G1 SoCs, the property is tied to the "cpus" node instead. Secondary CPU bringup and CPU hot (un)plug work regardless, as arm_dt_init_cpu_maps() falls back to looking in the "cpus" node. The cpuidle code does not have such a fallback, so it does not detect the enable-method. Note that cpuidle does not support the "renesas,apmu" enable-method yet, so for now this does not make any difference. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/35fcfedf9de9269185c48ca5a6dfcba7cdd3484b.1621427319.git.geert+renesas@glider.be
* ARM: dts: renesas: Add fck to etheravb-rcar-gen2 clock-names listAdam Ford2021-05-251-0/+1
| | | | | | | | | | The bindings have been updated to support two clocks. Add a clock-names list in the device tree with fck in it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210224115146.9131-2-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: renesas: Group tuples in APMU cpus propertiesGeert Uytterhoeven2021-03-081-1/+1
| | | | | | | | | To improve human readability and enable automatic validation, the tuples in "cpus" properties in device nodes for Advanced Power Management Units for AP-System Core (APMU) should be grouped using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210204130517.1647073-2-geert+renesas@glider.be
* ARM: dts: renesas: Fix pin controller node namesGeert Uytterhoeven2020-09-111-1/+1
| | | | | | | | | | According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
* ARM: dts: renesas: Fix SD Card/eMMC interface device node namesYoshihiro Shimoda2020-07-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the device node names as "mmc@". Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree") Fixes: a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support") Fixes: 43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming") Fixes: 7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming") Fixes: 3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes") Fixes: 63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers") Fixes: b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes") Fixes: d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree") Fixes: 7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers") Fixes: 0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support") Fixes: 15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support") Fixes: f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support") Fixes: 14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming") Fixes: 2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming") Fixes: b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming") Fixes: b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI") Fixes: ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support") Fixes: fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers") Fixes: b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support") Fixes: 33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: renesas: Fix IOMMU device node namesYoshihiro Shimoda2020-04-271-7/+7
| | | | | | | | | | | | | | | | Fix IOMMU device node names as "iommu@". Fixes: bbb44da0b595 ("ARM: dts: r8a7743: Add IPMMU DT nodes") Fixes: 0dcba3de5835 ("ARM: dts: r8a7745: Add IPMMU DT nodes") Fixes: 350ae49b97c4 ("ARM: dts: r8a7744: Add IPMMU DT nodes") Fixes: 70496727c082 ("ARM: shmobile: r8a7790: Add IPMMU DT nodes") Fixes: f1951852ed17 ("ARM: shmobile: r8a7791: Add IPMMU DT nodes") Fixes: 098cb3a601e6 ("ARM: shmobile: r8a7793: Add IPMMU nodes") Fixes: 1cb2794f6082 ("ARM: shmobile: r8a7794: Add IPMMU DT nodes") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/1587461756-13317-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: Add PWM device nodesGeert Uytterhoeven2020-04-201-0/+70
| | | | | | | | Enable support for the 7 PWM channels provided by PWM Timers on R-Car M2-W, by adding device nodes describing the PWM Timers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200316102540.28887-3-geert+renesas@glider.be
* ARM: dts: r8a7791: Add TPU device nodeGeert Uytterhoeven2020-04-201-0/+11
| | | | | | | | Enable support for the 4 PWM channels provided by the 16-bit Timer Pulse Unit on R-Car M2-W, by adding a device node describing the TPU. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200316102540.28887-2-geert+renesas@glider.be
* ARM: dts: rcar-gen2: Add reset control properties for displayGeert Uytterhoeven2020-02-241-2/+3
| | | | | | | | | | | | | Add reset control properties to the device nodes for the Display Units on all supported R-Car Gen2 SoCs. Note that on these SoCs, there is only a single reset for all DU channels. Join the clocks lines while at it, to increase uniformity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200218133019.22299-2-geert+renesas@glider.be
* ARM: dts: rcar-gen2: Add missing mmio-sram bus propertiesGeert Uytterhoeven2019-12-311-0/+3
| | | | | | | | | | | | | | | | | | "#address-cells", "#size-cells", and "ranges" are required properties for devices nodes compatible with "mmio-sram", leading to warnings when running "make dtbs_check": $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#address-cells' is a required property arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#size-cells' is a required property arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: 'ranges' is a required property ... Fix this by adding the missing properties to the mmio-sram device nodes in the DTS files for all affected R-Car Gen2 and RZ/G1 SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213162604.1890-1-geert+renesas@glider.be
* ARM: dts: rcar-gen2: Fix PCI high address in interrupt-map-maskGeert Uytterhoeven2019-12-311-2/+2
| | | | | | | | | | | | | | | | | | "make dtbs_check" emits warnings like: pci@ee090000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488 pci@ee0b0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488 pci@ee0d0000: interrupt-map-mask:0:0: 65280 is greater than the maximum of 63488 According to dt-schemas/schemas/pci/pci-bus.yaml, the PCI high address cell value in the "interrupt-map-mask" property must lie in the range 0..0xf800. Fix this by correcting the values from 0xff00 to 0xf800 in all affected R-Car Gen2 and RZ/G1 DTS files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213162459.1731-1-geert+renesas@glider.be
* ARM: dts: renesas: Group tuples in pci ranges and dma-ranges propertiesGeert Uytterhoeven2019-12-201-6/+6
| | | | | | | | | | | | | | | | | | To improve human readability and enable automatic validation, the tuples in the "ranges" and "dma-ranges" properties of PCI devices nodes should be grouped. Not doing so causes "make dtbs_check" to emit warnings like: pcie@fe000000: dma-ranges: [[1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0]] is not valid under any of the given schemas (Possible causes of the failure): pcie@fe000000: dma-ranges: [[1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0]] is not of type 'boolean' pcie@fe000000: dma-ranges:0: [1107296256, 0, 1073741824, 0, 1073741824, 0, 2147483648, 1124073472, 2, 0, 2, 0, 1, 0] is too long Fix this by grouping the tuples of the "ranges" and "dma-ranges" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-5-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
* ARM: dts: renesas: Group tuples in interrupt propertiesGeert Uytterhoeven2019-12-201-70/+70
| | | | | | | | | | | | | | | | | | To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. While "make dtbs_check" does not impose this yet for the "interrupts" property, it does for the "interrupt-map" property, leading to warnings like: pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long Fix this by grouping the tuples of the "interrupts" and "interrupt-map" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
* ARM: dts: Include R-Car Gen2 product name in DTSI filesMagnus Damm2018-09-281-1/+1
| | | | | | | | | | | | Improve the user friendliness of the DTS code base by including the R-Car product name in each R-Car Gen2 DTSI file. The product names are taken from: Documentation/devicetree/bindings/arm/shmobile.txt Signed-off-by: Magnus Damm <damm@opensource.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: rcar: Correct SATA device sizes to 2 MiBGeert Uytterhoeven2018-08-271-2/+2
| | | | | | | | | | | | Update the SATA device nodes on R-Car H1, H2, and M2-W to use a 2 MiB I/O space, as specified in Rev.1.0 of the R-Car H1 and R-Car Gen2 hardware user manuals. See also commit e9f0089b2d8a3d45 ("arm64: dts: r8a7795: Correct SATA device size to 2MiB"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: convert to SPDX identifier for Renesas boardsWolfram Sang2018-07-231-4/+1
| | | | | | | Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a77(43|9[013]): Add missing OPP properties for CPUsViresh Kumar2018-07-231-2/+12
| | | | | | | | | | | | | | | | | | | The OPP properties, like "operating-points", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can create an OPP table. Add such missing properties. Fix other missing properties (like, clock latency, voltage tolerance, etc) as well to make it all work. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2018-06-111-1/+36
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late updates from Olof Johansson: "This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits) soc: qcom: smem: introduce qcom_smem_virt_to_phys() soc: qcom: qmi: fix a buffer sizing bug MAINTAINERS: Update pattern for qcom_scm soc: Unconditionally include qcom Makefile soc: qcom: smem: check sooner in qcom_smem_set_global_partition() soc: qcom: smem: fix qcom_smem_set_global_partition() soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private() soc: qcom: smem: byte swap values properly soc: qcom: smem: return proper type for cached entry functions soc: qcom: smem: fix first cache entry calculation soc: qcom: cmd-db: Make endian-agnostic drivers: qcom: add command DB driver arm64: dts: renesas: salvator-common: Add ADV7482 support ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 arm64: dts: renesas: salvator-common: enable VIN arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7795-es1: add CSI-2 node ...
| * ARM: dts: r8a7791: Add PMU device nodeGeert Uytterhoeven2018-05-141-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Enable support for the ARM Performance Monitor Units in the Cortex-A15 CPU cores on R-Car M2-W by adding a device node for the PMU. New Linux output: hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: dts: r8a7791: Add watchdog support to SoC dtsiFabrizio Castro2018-04-251-0/+10
| | | | | | | | | | | | | | | | | | | | This commit adds watchdog support to the r8a7791 dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: dts: r8a7791: Adjust SMP routine sizeFabrizio Castro2018-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | This patch adjusts the definition of the SMP routine size according to the latest changes made by commit: "ARM: shmobile: Add watchdog support" Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: dts: renesas: r8a7791: Add FDP1 instancesLaurent Pinchart2018-04-251-0/+18
| | | | | | | | | | | | | | | | The r8a7791 has two FDP1 instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7791: Convert to new LVDS DT bindingsLaurent Pinchart2018-04-231-6/+30
|/ | | | | | | | | | | The internal LVDS encoder now has DT bindings separate from the DU. Port the device tree over to the new model. Fixes: c6a27fa41fab ("drm: rcar-du: Convert LVDS encoder code to bridge driver") Fixes: bb21803ea440 ("ARM: dts: r8a7791: add soc node") Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: consistently use single space before =Simon Horman2018-02-121-5/+5
| | | | | | | | | | | Consistently use a single space before a =. This patch fixes instances where a tab is used instead. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: sort subnodes of root nodeSimon Horman2018-02-121-67/+67
| | | | | | | | | | Sort subnodes of root node to aid maintenance. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: add soc nodeSimon Horman2018-02-121-1420/+1489
| | | | | | | | | | | | | | | | | Add soc node to represent the bus and move all nodes with a base address into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car Gen2 SoCs to this scheme. The ordering is derived from simply moving each node with an address up to before any nodes without a base address that occur before the soc node. To improve maintainability follow-up patches will sort subnodes of both the new soc node and the root node. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: consistently use single space after =Simon Horman2018-02-121-37/+38
| | | | | | | | | | | | | | Consistently use a single space after a =. This patch removes instances where a tab or multiple spaces are used instead. It also avoids running over 80 columns in width in one of the lines where whitespace is updated. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: Reduce size of thermal registersSimon Horman2018-02-121-1/+1
| | | | | | | | | | | | Reduce size of thermal registers in DT for r8a7791 (R-Car M3-W) SoC. According to the "User's Manual: Hardware" v2.00 the registers at base 0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the case on the r8a73a4 (R-Mobile APE6). This should not have any runtime affect as mapping granularity is PAGE_SIZE. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Correct critical CPU temperatureChris Paterson2017-12-181-1/+1
| | | | | | | | | | | | | | The R-Car M2W hardware manual states that Tc = –40°C to +105°C. The thermal sensor has an accuracy of ±5°C and there can be a temperature difference of 1 or 2 degrees between Tjmax and the thermal sensor due to the location of the latter. This means that 95°C is a safer value to use. Fixes: cac68a56e34b9810 ("ARM: dts: r8a7791: enable to use thermal-zone") Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Remove CMT renesas,channels-maskMagnus Damm2017-11-291-4/+0
| | | | | | | | | | | | Update the DTS to remove the now deprecated "renesas,channels-mask" property. The channel information is now kept in the device driver and can easily be determined based on the compat string. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Update CMT compat stringsMagnus Damm2017-11-291-2/+2
| | | | | | | | | | | | Use recently updated R-Car Gen2 CMT0 and CMT1 compat strings. With this change in place we can keep device-specific configuration in the driver and the driver can be able to support CMT1 specific features. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Use R-Car SDHI Gen2 fallback compat stringSimon Horman2017-11-271-3/+6
| | | | | | | | | | Use newly added R-Car SDHI Gen2 fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Use R-Car Gen2 Ether fallback compat stringSimon Horman2017-11-271-1/+2
| | | | | | | | | | | Use newly added R-Car Gen2 Ether fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: Add missing clock for secondary CA15 CPU coreGeert Uytterhoeven2017-10-161-0/+1
| | | | | | | | | Currently only the primary CPU in the CA15 cluster has a clocks property, while the secondary CPU core is driven by the same clock. Add the missing clocks property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Use R-Car GPIO Gen2 fallback compat stringSimon Horman2017-10-161-8/+8
| | | | | | | | | | | | Use newly added R-Car GPIO Gen2 fallback compat string in place of now deprecated non-generation specific R-Car GPIO fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before considering the fallback compat string. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: Use generic node name for VSP1 nodesGeert Uytterhoeven2017-10-061-3/+3
| | | | | | | Use the preferred generic node name instead of the specific name. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Add reset control propertiesGeert Uytterhoeven2017-09-191-0/+82
| | | | | | | | | | | | | | | | | Add properties to describe the reset topology for on-SoC devices: - Add the "#reset-cells" property to the CPG/MSSR device node, - Add resets and reset-names properties to the various device nodes. This allows to reset SoC devices using the Reset Controller API. Note that resets usually match the corresponding module clocks. Exceptions are: - The audio module has resets for the Serial Sound Interfaces only, - The display module has only a single reset for all DU channels, but adding reset properties for the display is postponed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Stop grouping clocks under a "clocks" subnodeGeert Uytterhoeven2017-09-191-71/+66
| | | | | | | | The current practice is to not group clocks under a "clocks" subnode, but just put them together with the other on-SoC devices. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Convert to new CPG/MSSR bindingsGeert Uytterhoeven2017-09-191-455/+102
| | | | | | | | | | | | | Convert the R-Car M2-W SoC from the old "Renesas R-Car Gen2 Clock Pulse Generator (CPG)", "Renesas CPG DIV6 Clock", and "Renesas CPG Module Stop (MSTP) Clocks" DT bindings to the new unified "Renesas Clock Pulse Generator / Module Standby and Software Reset" DT bindings. This simplifies the DTS files, and allows to add support for reset control later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Use R-Car SATA Gen2 fallback compat stringSimon Horman2017-08-171-2/+2
| | | | | | | | | | | Use newly added R-Car SATA Gen2 fallback compat string in the DT of the r8a7791 SoC. This should have no run-time effect as the driver matches against the per-SoC compat string before the fallback compat string is considered. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for vin nodesSimon Horman2017-07-271-3/+3
| | | | | | | | | | | Use R-Car Gen 2 fallback binding for vind nodes in DT for r8a7791 SoC. This has no run-time effect for the current driver as the initialisation sequence is the same for the SoC-specific binding for r8a7791 and the fallback binding for R-Car Gen 2 Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7791: Reserve SRAM for the SMP jump stubGeert Uytterhoeven2017-07-271-0/+8
| | | | | | | Reserve SRAM for the jump stub for CPU core bringup. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Add Inter Connect RAMGeert Uytterhoeven2017-07-271-0/+10
| | | | | | | R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a779x: Fix PCI bus dtc warningsRob Herring2017-06-121-10/+6
| | | | | | | | | | | | | | | The bogus 'device_type = "pci"' confuses dtc, causing lots of totally unrelated warnings. After fixing that, real warnings like arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0" are left. Correct the unit-addresses and reg properties of the subnodes to fix these. Signed-off-by: Rob Herring <robh@kernel.org> [geert: Improve description] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: Add GyroADC clock and device nodeMarek Vasut2017-05-151-1/+13
| | | | | | | | Add node for the GyroADC block and it's associated clock. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7791: update PFC node name to pin-controllerSimon Horman2017-05-151-1/+1
| | | | | | | | | | | | | | The device trees for Renesas SoCs use either pfc or pin-controller as the node name for the PFC device. This patch is intended to take a step towards unifying the node name used as pin-controller which appears to be the more generic of the two and thus more in keeping with the DT specs. My analysis is that this is a user-visible change to the extent that kernel logs, and sysfs entries change from e6060000.pfc and pfc@e6060000 to e6060000.pin-controller and pin-controller@e6060000. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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