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* MIPS: BCM63XX: add support for the Netgear CVG834GFlorian Fainelli2013-07-011-0/+35
| | | | | | | | | | | | | Add support for the Netgear CVG834G and enable the two UARTs, Ethernet on the first MAC, PCI and the two leds. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5502/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: let board specify an external GPIO to reset PHYFlorian Fainelli2013-07-011-0/+4
| | | | | | | | | | | | | | Some boards may need to reset their external PHY or switch they are attached to, add a hook for doing this along with providing custom linux/gpio.h flags for doing this. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5501/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: provide a MAC address for BCM3368 chipsFlorian Fainelli2013-07-011-0/+10
| | | | | | | | | | | | | | The BCM3368 SoC uses a NVRAM format which is not compatible with the one used by CFE, provide a default MAC address which is suitable for use and which is the default one also being used by the bootloader on these chips. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5498/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: recognize Cable Modem firmware formatFlorian Fainelli2013-07-011-2/+12
| | | | | | | | | | | | | | | Add the firmware header format which is used by Broadcom Cable Modem SoCs such as the BCM3368 SoC. We export the bcm_hcs firmware format structure because it is used by user-land tools to create firmware images for these SoCs and will later be used by a corresponding MTD parser. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: add support for BCM3368 Cable ModemFlorian Fainelli2013-07-0110-17/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | The Broadcom BCM3368 Cable Modem SoC is extremely similar to the existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort in the existing code base is required to get it supported. This patch adds support for the following on-chip peripherals: - two UARTS - GPIO - Ethernet - SPI - PCI - NOR Flash The most noticeable difference with 3368 is that it has its peripheral register at 0xfff8_0000 we check that separately in ioremap.h. Since 3368 is identical to 6358 for its clock and reset bits, we use them verbatim. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Handle SW IRQs 0-1Kevin Cernekee2013-07-011-0/+4
| | | | | | | | | | | | | | | MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI) on BMIPS SMP. Make the board support code aware of them. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> [jogo@openwrt.org: move sw irqs behind timer irq] Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-05-1010-80/+204
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: - More work on DT support for various platforms - Various fixes that were to late to make it straight into 3.9 - Improved platform support, in particular the Netlogic XLR and BCM63xx, and the SEAD3 and Malta eval boards. - Support for several Ralink SOC families. - Complete support for the microMIPS ASE which basically reencodes the existing MIPS32/MIPS64 ISA to use non-constant size instructions. - Some fallout from LTO work which remove old cruft and will generally make the MIPS kernel easier to maintain and resistant to compiler optimization, even in absence of LTO. - KVM support. While MIPS has announced hardware virtualization extensions this KVM extension uses trap and emulate mode for virtualization of MIPS32. More KVM work to add support for VZ hardware virtualizaiton extensions and MIPS64 will probably already be merged for 3.11. Most of this has been sitting in -next for a long time. All defconfigs have been build or run time tested except three for which fixes are being sent by other maintainers. Semantic conflict with kvm updates done as per Ralf * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (118 commits) MIPS: Add new GIC clockevent driver. MIPS: Formatting clean-ups for clocksources. MIPS: Refactor GIC clocksource code. MIPS: Move 'gic_frequency' to common location. MIPS: Move 'gic_present' to common location. MIPS: MIPS16e: Add unaligned access support. MIPS: MIPS16e: Support handling of delay slots. MIPS: MIPS16e: Add instruction formats. MIPS: microMIPS: Optimise 'strnlen' core library function. MIPS: microMIPS: Optimise 'strlen' core library function. MIPS: microMIPS: Optimise 'strncpy' core library function. MIPS: microMIPS: Optimise 'memset' core library function. MIPS: microMIPS: Add configuration option for microMIPS kernel. MIPS: microMIPS: Disable LL/SC and fix linker bug. MIPS: microMIPS: Add vdso support. MIPS: microMIPS: Add unaligned access support. MIPS: microMIPS: Support handling of delay slots. MIPS: microMIPS: Add support for exception handling. MIPS: microMIPS: Floating point support. MIPS: microMIPS: Fix macro naming in micro-assembler. ...
| * MIPS: BCM63XX: add missing clocks for BCM6328 and BCM6362Jonas Gorski2013-05-081-8/+25
| | | | | | | | | | | | | | | | | | Add some mosty unused, but missing clocks for BCM6328 and BCM6362. This also fixes PCIe init on BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5200/ Acked-by: John Crispin <blogic@openwrt.org>
| * MIPS: BCM63XX: merge bcm63xx_clk.h into bcm63xx/clk.cJonas Gorski2013-05-081-1/+7
| | | | | | | | | | | | | | | | | | | | All the header file does is provide the internal structure of clk, which shouldn't be used by anyone except clk.c itself anyway. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Patchwork: http://patchwork.linux-mips.org/patch/5055/ Acked-by: John Crispin <blogic@openwrt.org>
| * MIPS: BCM63XX: add flash detection for BCM6362Jonas Gorski2013-05-081-0/+6
| | | | | | | | | | | | | | | | BCM6362 support booting from SPI flash and NAND. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5012/ Acked-by: John Crispin <blogic@openwrt.org>
| * MIPS: BCM63XX: enable SPI controller for BCM6362Jonas Gorski2013-05-082-2/+4
| | | | | | | | | | | | | | | | The SPI controller shares the same register layout as the 6358 one. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5010/ Acked-by: John Crispin <blogic@openwrt.org>
| * MIPS: BCM63XX: add basic BCM6362 supportJonas Gorski2013-05-087-4/+112
| | | | | | | | | | | | | | | | Add basic support for detecting and booting the BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5009/ Acked-by: John Crispin <blogic@openwrt.org>
| * MIPS: BCM63XX: rework chip detectionJonas Gorski2013-05-081-45/+42
| | | | | | | | | | | | | | | | | | | | Instead of trying to use a correlation of cpu prid and chip id and hoping they will always be unique, use the cpu prid to determine the chip id register location and just read out the chip id. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5008/ Acked-by: John Crispin <blogic@openwrt.org>
| * MIPS: BCM63XX: fix revision ID widthJonas Gorski2013-05-082-3/+3
| | | | | | | | | | | | | | | | The REVID is only 8 bit wide. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5007/ Acked-by: John Crispin <blogic@openwrt.org>
| * MIPS: BCM63XX: remove duplicate spi register definitionsJonas Gorski2013-05-081-18/+6
| | | | | | | | | | | | | | | | | | | | | | BCM6338 and BCM6348, and BCM6358 and everything after that share the same register layout. To not have to redefine them for each new chip and keep the code size small, only use the definitions for the first chip with the certain layout. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5006/ Acked-by: John Crispin <blogic@openwrt.org>
* | Merge tag 'spi-v3.10' of ↵Linus Torvalds2013-04-291-11/+0
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A fairly quiet release for SPI, mainly driver work. A few highlights: - Supports bits per word compatibility checking in the core. - Allow use of the IP used in Freescale SPI controllers outside Freescale SoCs. - DMA support for the Atmel SPI driver. - New drivers for the BCM2835 and Tegra114" * tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits) spi-topcliff-pch: fix to use list_for_each_entry_safe() when delete list items spi-topcliff-pch: missing platform_driver_unregister() on error in pch_spi_init() ARM: dts: add pinctrl property for spi node for atmel SoC ARM: dts: add spi nodes for the atmel boards ARM: dts: add spi nodes for atmel SoC ARM: at91: add clocks for spi dt entries spi/spi-atmel: add dmaengine support spi/spi-atmel: add flag to controller data for lock operations spi/spi-atmel: add physical base address spi/sirf: fix MODULE_DEVICE_TABLE MAINTAINERS: Add git repository and update my address spi/s3c64xx: Check for errors in dmaengine prepare_transfer() spi/s3c64xx: Fix non-dmaengine usage spi: omap2-mcspi: fix error return code in omap2_mcspi_probe() spi/s3c64xx: let device core setup the default pin configuration MAINTAINERS: Update Grant's email address and maintainership spi: omap2-mcspi: Fix transfers if DMADEVICES is not set spi: s3c64xx: move to generic dmaengine API spi-gpio: init CS before spi_bitbang_setup() spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loop ...
| * spi/bcm63xx: remove unused speed_hz variableJonas Gorski2013-04-081-11/+0
| | | | | | | | | | | | | | | | | | speed_hz is a write only member, so we can safely remove it and its generation. Also fixes the missing clk_put after getting the periph clock. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | Revert "MIPS: BCM63XX: Call board_register_device from device_initcall()"Jonas Gorski2013-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit causes a race between PCI scan and SSB fallback SPROM handler registration, causing the wifi to not work on slower systems. The only subsystem touched from board_register_devices is platform device registration, which is safe as an arch init call. This reverts commit d64ed7ada2f689d2c62af1892ca55e47d3653e36 [MIPS: BCM63XX: Call board_register_device from device_initcall()]. Signed-off-by: Jonas Gorski <jogo@openwrt.org> To: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: BCM63XX: Make nvram checksum failure non fatalJonas Gorski2013-03-192-8/+4
|/ | | | | | | | | | | | | | Some vendors modify the nvram layout moving the checksum to a different place or dropping entirely, so reduce the checksum failure to a warning. Reported-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'mips-next-3.9' of ↵Ralf Baechle2013-02-211-2/+2
|\ | | | | | | git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
| * MIPS: early_printk: drop __init annotationsAaro Koskinen2013-02-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | We cannot use __init for earlyprintk code or data, since the kernel parameter "keep_bootcon" allows leaving the boot console enabled. Currently MIPS will crash/hang/die if you use keep_bootcon. The patch fixes it at least on Lemote FuLoong mini-PC. Changes for other boards were done based on what I could find with grep... Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Patchwork: http://patchwork.linux-mips.org/patch/4935/ Signed-off-by: John Crispin <blogic@openwrt.org>
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-13/+13
|/ | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: fix nvram checksum calculationJonas Gorski2012-12-121-10/+13
| | | | | | | | | | | The current checksum calculation code does nothing except checking that the first byte of nvram is 0 without actually checking the checksum. Implement the correct checksum calculation by calculating the crc32 with the checksum field set to 0. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4540
* MIPS: BCM63XX: move nvram functions into their own fileJonas Gorski2012-11-093-63/+119
| | | | | | | | | Refactor nvram related functions into its own unit for easier expansion and exposure of the values to other drivers. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4516 Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: use the new reset helperJonas Gorski2012-11-091-14/+5
| | | | | | | | Use the new reset helper where appropriate. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4453 Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: add core reset helperJonas Gorski2012-11-092-3/+226
| | | | | | | | Add a reset helper for resetting the different cores. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4455 Signed-off-by: John Crispin <blogic@openwrt.org>
* MIPS: BCM63XX: add and use a clock for PCIeJonas Gorski2012-11-091-0/+15
| | | | | | | | | | Add a PCIe clock and use that instead of directly touching the clock control register. While at it, fail if there is no such clock. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4452 Signed-off-by: John Crispin <blogic@openwrt.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-10-096-14/+128
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS update from Ralf Baechle: "This is the MIPS update for 3.7. A fair chunk of them are platform updates to the Cavium Octeon SOC (which involves machine generated header files of considerable size), Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx platforms. Support for the commercial MIPS simulator MIPSsim has been removed as MIPS Technologies is shifting away from this product and Qemu is offering various more powerful platforms. The generic MIPS code can now also probe for no-execute / write-only TLB features implemented without the full SmartMIPS extension as permitted by the latest MIPS processor architecture. Lots of small changes to generic code." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits) MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x MIPS: BCM63XX: Properly handle mac address octet overflow MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user. MIPS: Replace `-' in defconfig filename wth `_' for consistency. MIPS: Wire kcmp syscall. MIPS: MIPSsim: Remove the MIPSsim platform. MIPS: NOTIFY_RESUME is not needed in TIF masks MIPS: Merge the identical "return from syscall" per-ABI code MIPS: Unobfuscate _TIF..._MASK MIPS: Prevent hitting do_notify_resume() with !user_mode(regs). MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'. MIPS: Add base architecture support for RI and XI. MIPS: Optimise TLB handlers for MIPS32/64 R2 cores. MIPS: uasm: Add INS and EXT instructions. MIPS: Avoid pipeline stalls on some MIPS32R2 cores. MIPS: Make VPE count to be one-based. MIPS: Add new end of interrupt functionality for GIC. MIPS: Add EIC support for GIC. MIPS: Code clean-ups for the GIC. ...
| * Merge branch 'master' of git://dev.phrozen.org/mips-next into ↵Ralf Baechle2012-10-052-5/+23
| |\ | | | | | | | | | mips-for-linux-next
| | * MIPS: BCM63XX: use a switch for external irq configMaxime Bizon2012-08-241-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Makes the code a bit more readable and easier to add support for new chips. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4093/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: BCM63XX: don't write to the chipid register on rebootMaxime Bizon2012-08-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | While harmless, it is bad style to do so. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4092/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * MIPS: BCM63XX: add external irq support for BCM6345Maxime Bizon2012-08-242-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the missing definitions for BCM6345. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4091/ Signed-off-by: John Crispin <blogic@openwrt.org>
| * | MIPS: BCM63XX: Properly handle mac address octet overflowJonas Gorski2012-10-011-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While calculating the mac address the pointer for the current octet was never reset back to the least significant one after being decremented because of an octet overflow. This resulted in the code continuing to increment at the current octet, potentially generating duplicate or invalid mac addresses. As a second issue the pointer was allowed to advance up to the most significant octet, modifying the OUI, and potentially changing the type of mac address. Rewrite the code so it resets the pointer to the least significant in each outer loop step, and bails out when the least significant octet of the OUI is reached. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Patchwork: https://patchwork.linux-mips.org/patch/4348/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | Merge branch 'broadcom' of git://dev.phrozen.org/mips-next into ↵Ralf Baechle2012-09-274-2/+96
| |\ \ | | | | | | | | | | | | mips-for-linux-next
| | * | MIPS: BCM63XX: Create platform_device for USBDKevin Cernekee2012-08-303-1/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Reviewed-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4111/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | MIPS: BCM63XX: Expose the USBH/USBD clocks on BCM6328/BCM6368Kevin Cernekee2012-08-301-1/+20
| | |/ | | | | | | | | | | | | | | | Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4022/ Signed-off-by: John Crispin <blogic@openwrt.org>
* | | sections: fix section conflicts in arch/mipsAndi Kleen2012-10-061-1/+1
|/ / | | | | | | | | | | | | Signed-off-by: Andi Kleen <ak@linux.intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348.Florian Fainelli2012-08-171-0/+4
|/ | | | | | | | | | | | | | | | | | | | | BCM6338 and BCM6348 have a message control register width of 8 bits, instead of 16-bits like what the SPI driver assumes right now. Also the SPI message type shift value of 14 is actually 6 for these SoCs. This resulted in transmit FIFO corruption because we were writing 16-bits to an 8-bits wide register, thus spanning on the first byte of the transmit FIFO, which had already been filed in bcm63xx_spi_fill_txrx_fifo(). Fix this by passing the message control register width and message type shift through platform data back to the SPI driver so that it can use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Cc: jonas.gorski@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/3983/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add 96328avng reference boardJonas Gorski2012-07-241-0/+45
| | | | | | | | | | | | | | This allows booting to command line. Ethernet is not supported yet, but PCIe connected wireless should work. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3958/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add PCIe Support for BCM6328Jonas Gorski2012-07-241-0/+1
| | | | | | | | | | | | | Add support for the PCIe port found on BCM6328. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3956/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add basic BCM6328 supportJonas Gorski2012-07-248-8/+96
| | | | | | | | | | | | | | This includes CPU speed, memory size detection and working UART, but lacking the appropriate drivers, no support for attached flash. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3951/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Use the Chip ID register for identifying the SoCJonas Gorski2012-07-241-8/+12
| | | | | | | | | | | | | | | Newer BCM63XX SoCs use virtually the same CPU ID, differing only in the revision bits. But since they all have the Chip ID register at the same location, we can use that to identify the SoC we are running on. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3955/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Add flash type detectionJonas Gorski2012-07-241-6/+54
| | | | | | | | | | | | | | | On BCM6358 and BCM6368 the attached flash type is exposed through a bootstrapping register. Use it for auto detecting the flash type on those and default to parallel flash for earlier SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3954/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Move flash registration out of board_bcm963xx.cJonas Gorski2012-07-243-49/+73
| | | | | | | | | | | | | board_bcm963xx.c is already large enough. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3952/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: add RNG driver platform_device stubFlorian Fainelli2012-07-242-2/+42
| | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3325/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: add support for "ipsec" clockFlorian Fainelli2012-07-241-0/+14
| | | | | | | | | | | | This module is only available on BCM6368 so far and does not require resetting the block. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: mpm@selenic.com Cc: herbert@gondor.apana.org.au Patchwork: https://patchwork.linux-mips.org/patch/3324/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63XX: Fix platform_devices idFlorian Fainelli2012-07-242-2/+2
| | | | | | | | | | There is only one watchdog and VoIP DSP platform devices per board, use -1 as the platform_device id accordingly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3313/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Make board setup code register the spi platform deviceFlorian Fainelli2012-07-231-0/+3
| | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add stub to register the SPI platform driverFlorian Fainelli2012-07-232-1/+121
| | | | | | | | | | | | | | This patch adds the necessary stub to register the SPI platform driver. Since the registers are shuffled between the 4 BCM63xx CPUs supported by this SPI driver we also need to generate the internal register layout and export this layout for the driver to use it properly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Add BCM6368 SPI clock maskFlorian Fainelli2012-07-231-2/+4
| | | | | | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: grant.likely@secretlab.ca Cc: spi-devel-general@lists.sourceforge.net Patchwork: https://patchwork.linux-mips.org/patch/3319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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