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* KVM: PPC: Add KVM intercept handlersAlexander Graf2010-05-171-0/+14
| | | | | | | | | | | | | When an interrupt occurs we don't know yet if we're in guest context or in host context. When in guest context, KVM needs to handle it. So let's pull the same trick we did on Book3S_64: Just add a macro to determine if we're in guest context or not and if so jump on to KVM code. CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Avi Kivity <avi@redhat.com>
* powerpc: gamecube/wii: early debugging using usbgeckoAlbert Herranz2009-12-121-0/+25
| | | | | | | | | | | Add support for using the USB Gecko adapter as an early debugging console on the Nintendo GameCube and Wii video game consoles. The USB Gecko is a 3rd party memory card interface adapter that provides a EXI (External Interface) to USB serial converter. Signed-off-by: Albert Herranz <albert_herranz@yahoo.es> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* powerpc: Use names rather than numbers for SPRGs (v2)Benjamin Herrenschmidt2009-08-201-20/+20
| | | | | | | | | | | | | | | | | | | | | | The kernel uses SPRG registers for various purposes, typically in low level assembly code as scratch registers or to hold per-cpu global infos such as the PACA or the current thread_info pointer. We want to be able to easily shuffle the usage of those registers as some implementations have specific constraints realted to some of them, for example, some have userspace readable aliases, etc.. and the current choice isn't always the best. This patch should not change any code generation, and replaces the usage of SPRN_SPRGn everywhere in the kernel with a named replacement and adds documentation next to the definition of the names as to what those are used for on each processor family. The only parts that still use the original numbers are bits of KVM or suspend/resume code that just blindly needs to save/restore all the SPRGs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Map more memory early on 601 processorsBenjamin Herrenschmidt2009-06-261-7/+10
| | | | | | | | | | | | | | | The 32-bit kernel relies on some memory being mapped covering the kernel text,data and bss at least, early during boot before the full MMU setup is done. On 32-bit "classic" processors, this is done using BAT registers. On 601, the size of BATs is limited to 8M and we use 2 of them for that initial mapping. This can become quite tight when enabling features like lockdep, so let's use a 3rd one to bump that mapping from 16M to 24M. We keep the 4th BAT free as it can be useful for debugging early boot code to map things like serial ports. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Fix bug in move of altivec code to vector.SBenjamin Herrenschmidt2009-06-121-2/+4
| | | | | | | | The patch that moved to vector.S and made common between 32 and 64-bit the altivec code had a nasty bug on 32-bit (did I really test that ?) which causes the kernel to blr back into userspace ... oops :-) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Move VMX and VSX asm code to vector.SBenjamin Herrenschmidt2009-06-091-95/+0
| | | | | | | | | | | | | Currently, load_up_altivec and give_up_altivec are duplicated in 32-bit and 64-bit. This creates a common implementation that is moved away from head_32.S, head_64.S and misc_64.S and into vector.S, using the same macros we already use for our common implementation of load_up_fpu. I also moved the VSX code over to vector.S though in that case I didn't make it build on 32-bit (yet). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: convert to use __HEAD and HEAD_TEXT macros.Tim Abbott2009-04-261-1/+2
| | | | | | | | | | | This has the consequence of changing the section name use for head code from ".text.head" to ".head.text". Since this commit changes all users in the architecture, this change should be harmless. Signed-off-by: Tim Abbott <tabbott@mit.edu> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* powerpc/mm: e300c2/c3/c4 TLB errata workaroundKumar Gala2009-03-241-4/+28
| | | | | | | | | | | | | Complete workaround for DTLB errata in e300c2/c3/c4 processors. Due to the bug, the hardware-implemented LRU algorythm always goes to way 1 of the TLB. This fix implements the proposed software workaround in form of a LRW table for chosing the TLB-way. Based on patch from David Jander <david@protonic.nl> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/mm: Used free register to save a few cycles in SW TLB miss handlingKumar Gala2009-03-241-27/+24
| | | | | | | | | Now that r0 is free we can keep the value of I/DMISS in r3 and not reload it before doing the tlbli/d. This saves us a few cycles in the fast path case. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/mm: Remove unused register usage in SW TLB miss handlingKumar Gala2009-03-241-8/+3
| | | | | | | | | | Long ago we had some code that actually used the CTR in the SW TLB miss handlers (603/e300). Since we don't use it no reason to waste cycles saving it off and restoring it (we actually didn't restore it in the fast path case). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge commit 'origin/master' into nextBenjamin Herrenschmidt2009-03-241-3/+12
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| * powerpc/mm: Fix Respect _PAGE_COHERENT on classic ppc32 SW TLB load machinesKumar Gala2009-03-231-0/+9
| | | | | | | | | | | | | | | | | | | | Grant picked up the wrong version of "Respect _PAGE_COHERENT on classic ppc32 SW" (commit a4bd6a93c3f14691c8a29e53eb04dc734b27f0db) It was missing the code to actually deal with the fixup of _PAGE_COHERENT based on the CPU feature. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/mm: Respect _PAGE_COHERENT on classic ppc32 SWKumar Gala2009-03-171-3/+3
| | | | | | | | | | | | | | | | | | | | Since we now set _PAGE_COHERENT in the Linux PTE we shouldn't be clearing it out before we setup the SW TLB. Today all the SW TLB machines (603/e300) that we support are non-SMP, however there are some errata on some devices that cause us to set _PAGE_COHERENT via CPU_FTR_NEED_COHERENT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | powerpc/kconfig: Kill PPC_MULTIPLATFORMBenjamin Herrenschmidt2009-03-111-2/+5
|/ | | | | | | | | | | | | | | | | | | | | | CONFIG_PPC_MULTIPLATFORM is a remain of the pre-powerpc days and isn't really meaningful anymore. It was basically equivalent to PPC64 || 6xx. This removes it along with the following changes: - 32-bit platforms that relied on PPC32 && PPC_MULTIPLATFORM now rely on 6xx which is what they want anyway. - A new symbol, PPC_BOOK3S, is defined that represent compliance with the "Server" variant of the architecture. This is set when either 6xx or PPC64 is set and open the door for future BOOK3E 64-bit. - 64-bit platforms that relied on PPC64 && PPC_MULTIPLATFORM now use PPC64 && PPC_BOOK3S - A separate and selectable CONFIG_PPC_OF_BOOT_TRAMPOLINE option is now used to control the use of prom_init.c Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/32: Add the ability for a classic ppc kernel to be loaded at 32MDale Farnsworth2008-12-231-5/+6
| | | | | | | | | | | Add the ability for a classic ppc kernel to be loaded at an address of 32MB. This done by fixing a few places that assume we are loaded at address 0, and by changing several uses of KERNELBASE to use PAGE_OFFSET, instead. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc/mm: Introduce MMU featuresBenjamin Herrenschmidt2008-12-211-4/+4
| | | | | | | | | | | | We're soon running out of CPU features and I need to add some new ones for various MMU related bits, so this patch separates the MMU features from the CPU features. I moved over the 32-bit MMU related ones, added base features for MMU type families, but didn't move over any 64-bit only feature yet. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc/mm: Split mmu_context handlingBenjamin Herrenschmidt2008-12-211-1/+11
| | | | | | | | | | This splits the mmu_context handling between 32-bit hash based processors, 64-bit hash based processors and everybody else. This is preliminary work for adding SMP support for BookE processors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Fix 32-bit SMP boot on CHRPBenjamin Herrenschmidt2008-10-151-0/+6
| | | | | | | | | | | | prom_init was changed to take a new argument, the address where the kernel is loaded, which is now used to copy the SMP spin loop down before use. However, only head_64.S was adapted to pass this new value, not head_32.S, thus breaking SMP boot on 32-bit SMP CHRP machines. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* POWERPC: Allow 32-bit hashed pgtable code to support 36-bit physicalBecky Bruce2008-09-241-2/+2
| | | | | | | | | | | | | | | | | | This rearranges a bit of code, and adds support for 36-bit physical addressing for configs that use a hashed page table. The 36b physical support is not enabled by default on any config - it must be explicitly enabled via the config system. This patch *only* expands the page table code to accomodate large physical addresses on 32-bit systems and enables the PHYS_64BIT config option for 86xx. It does *not* allow you to boot a board with more than about 3.5GB of RAM - for that, SWIOTLB support is also required (and coming soon). Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Fix TLB invalidation on boot on 32-bitRocky Craig2008-08-181-1/+1
| | | | | | | | | | | | | The intent of "flush_tlbs" is to invalidate all TLB entries by doing a TLB invalidate instruction for all pages in the address range 0 to 0x00400000. A loop counter is set up at the high value and decremented by page size. However, the loop is only done once as the sense of the conditional branch at the loop end does not match the setup/decrement. This fixes it to do the whole range by correcting the branch condition. Signed-off-by: Rocky Craig <rocky.craig@hp.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Make load_up_fpu and load_up_altivec callableMichael Neuling2008-07-011-2/+4
| | | | | | | | Make load_up_fpu and load_up_altivec callable so they can be reused by the VSX code. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Move stackframe definitions to common headerBenjamin Herrenschmidt2008-04-181-2/+3
| | | | | | | | This moves various definitions used all over the place to parse stack frames to ptrace.h so only one definition is needed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove dead code at KernelAltiVecDale Farnsworth2008-02-261-17/+0
| | | | | | | This code isn't referenced anywhere, so remove it. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix swapper_pg_dir size when CONFIG_PTE_64BIT=y on FSL_BOOKEKumar Gala2007-12-061-1/+1
| | | | | | | | | The size of swapper_pg_dir is 8k instead of 4k when using 64-bit PTEs (CONFIG_PTE_64BIT). This was reported by Cedric Hombourger <chombourger@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB ↵Kumar Gala2007-10-111-9/+9
| | | | | | | | | | handlers Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on 6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or user space address. This mimics how the macro is_kernel_addr() works. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add early debug console for CPM serial ports.Scott Wood2007-10-031-0/+16
| | | | | | | | | This code assumes that the ports have been previously set up, with buffers in DPRAM. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Remove cmd_line from head*.SStephen Rothwell2007-09-191-8/+0
| | | | | | | It is just a C char array, so declare it thusly. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix modpost warnings from head*.S on ppc32Kumar Gala2007-09-141-10/+7
| | | | | | | | | | | | | | | We get warnings like the following from the various ppc32 head*.S files: WARNING: vmlinux.o(.text+0x358): Section mismatch: reference to .init.text:early_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x380): Section mismatch: reference to .init.text:machine_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x384): Section mismatch: reference to .init.text:MMU_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3aa): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3ae): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') Added a .text.head section simliar to what other architectures do since modpost already excludes this from its warnings. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Check _PAGE_RW and _PAGE_PRESENT on kernel addressesScott Wood2007-09-141-6/+6
| | | | | | | | | Previously, the TLB miss handlers assumed that pages above KERNELBASE are always present and read/write. This assumption is false in the case of CONFIG_DEBUG_PAGEALLOC. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove the dregs of APUS support from arch/powerpcDavid Gibson2007-06-141-119/+3
| | | | | | | | | | | | | APUS (the Amiga Power-Up System) is not supported under arch/powerpc and it's unlikely it ever will be. Therefore, this patch removes the fragments of APUS support code from arch/powerpc which have been copied from arch/ppc. A few APUS references are left in asm-powerpc in .h files which are still used from arch/ppc. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove the broken Gemini supportAdrian Bunk2007-01-241-5/+0
| | | | | Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add support for FP emulation for the e300c2 coreKim Phillips2006-12-081-0/+7
| | | | | | | | | | | | | | | | | | | | The e300c2 has no FPU. Its MSR[FP] is grounded to zero. If an attempt is made to execute a floating point instruction (including floating-point load, store, or move instructions), the e300c2 takes a floating-point unavailable interrupt. This patch adds support for FP emulation on the e300c2 by declaring a new CPU_FTR_FP_TAKES_FPUNAVAIL, where FP unavail interrupts are intercepted and redirected to the ProgramCheck exception path for correct emulation handling. (If we run out of CPU_FTR bits we could look to reclaim this bit by adding support to test the cpu_user_features for PPC_FEATURE_HAS_FPU instead) It adds a nop to the exception path for 32-bit processors with a FPU. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Remove obsolete #include <linux/config.h>Jörn Engel2006-06-301-1/+0
| | | | | Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* [POWERPC] Add starting of secondary 86xx CPUs.Jon Loeliger2006-06-211-1/+13
| | | | | | | | | | Clear the high BATS during load_up_mmu if FTR_HAS_HIGH_BATS. Allow just a bit more time for secondary CPUs to phone home. Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: fix altivec_unavailable_exception OopsesAlan Curry2006-02-241-0/+1
| | | | | | | | | | | | | altivec_unavailable_exception is called without setting r3... it looks like the r3 that actually gets passed in as struct pt_regs *regs is the undisturbed value of r3 at the time the altivec instruction was encountered. The user actually gets to choose the pt_regs printed in the Oops! This fixes the oops by passing the correct pt_regs pointer to altivec_unavailable_exception. Signed-off-by: Alan Curry <pacman@TheWorld.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: set CONFIG_PPC_OF=y always for ARCH=powerpcPaul Mackerras2006-01-091-0/+2
| | | | | | | | | | | | The CONFIG_PPC_OF symbol is used to mean that the firmware device tree access functions are available. Since we always have a device tree with ARCH=powerpc, make CONFIG_PPC_OF always Y for ARCH=powerpc. This fixes some compile errors reported by Kumar Gala, but in a different way to his patch. This also makes prom_parse.o be compiled only if CONFIG_PPC_OF so that non-OF ARCH=ppc platforms will compile. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: G4+ oprofile supportAndy Fleming2006-01-091-6/+6
| | | | | | | | | | | | | | | This patch adds oprofile support for the 7450 and all its multitudinous derivatives. * Added 7450 (and derivatives) support for oprofile * Changed e500 cputable to have oprofile model and cpu_type fields * Added support for classic 32-bit performance monitor interrupt * Cleaned up common powerpc oprofile code to be as common as possible * Cleaned up oprofile_impl.h to reflect 32 bit classic code * Added 32-bit MMCRx bitfield definitions and SPR numbers Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Add back support for booting from BootX (#2)Benjamin Herrenschmidt2006-01-091-0/+13
| | | | | | | | | | ARCH=powerpc couldn't boot from BootX as it uses a "different" way of getting in the kernel. This patch adds the necessary trampolines, creating a flattened device-tree from the tree passed from MacOS, and initializing the btext engine early for really-early debugging. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Unify udbg (#2)Benjamin Herrenschmidt2006-01-091-0/+29
| | | | | | | | | | | | | | | | | | This patch unifies udbg for both ppc32 and ppc64 when building the merged achitecture. xmon now has a single "back end". The powermac udbg stuff gets enriched with some ADB capabilities and btext output. In addition, the early_init callback is now called on ppc32 as well, approx. in the same order as ppc64 regarding device-tree manipulations. The init sequences of ppc32 and ppc64 are getting closer, I'll unify them in a later patch. For now, you can force udbg to the scc using "sccdbg" or to btext using "btextdbg" on powermacs. I'll implement a cleaner way of forcing udbg output to something else than the autodetected OF output device in a later patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Initialize secondary CPU setup for 32-bit SMPPaul Mackerras2005-11-111-0/+1
| | | | | | | | | 32-bit SMP powermacs weren't booting with ARCH=powerpc because the boot cpu wasn't saving away the state of various control registers, but the secondary CPUs were loading them from the uninitialized state. This adds the necessary save-state call. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Merge xmonPaul Mackerras2005-10-281-0/+3
| | | | | | | | | | | The merged version follows the ppc64 version pretty closely mostly, and in fact ARCH=ppc64 now uses the arch/powerpc/xmon version. The main difference for ppc64 is that the 'p' command to call show_state (which was always pretty dodgy) has been replaced by the ppc32 'p' command, which calls a given procedure (so in fact the old 'p' command behaviour can be achieved with 'p $show_state'). Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Rename asm offset TRAP to _TRAP for 32-bitPaul Mackerras2005-10-281-1/+1
| | | | | | ... for consistency with 64-bit. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Merge 32-bit CHRP support.Paul Mackerras2005-10-261-1/+8
| | | | | | | SMP still needs more work but UP gets as far as starting userspace at least. This uses the 64-bit-style code for spinning up the cpus. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Fix various compile errors with ARCH=ppc, ppc64 and powerpcPaul Mackerras2005-10-181-1/+1
| | | | | | | | This makes ppc use the syscalls.c from arch/powerpc/kernel, exports copy_and_flush from head_32.S for use by prom_init.c (ARCH=powerpc), and consolidates the sys_fadvise64_64 implementations for 32-bit. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Initialize btext subsystem later, after prom_initPaul Mackerras2005-10-171-28/+0
| | | | | | | | | | | | We were initializing the btext stuff from prom_init(), thus breaking the rule that all communication between prom_init() and the rest of the kernel has to be via the flattened device tree. This removes the btext initialization calls from prom_init() and initializes it instead after the device tree is unflattened. It would be nice to do it earlier, but that needs some more infrastructure to find the properties we need in the flattened device tree. Signed-off-by: Paul Mackerras <paulus@samba.org>
* ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTESStephen Rothwell2005-10-171-1/+1
| | | | | | instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
* powerpc: Use reg.h instead of processor.h when we just want reg namesPaul Mackerras2005-10-101-3/+3
| | | | | | | Now that the register names and bit definitions are all in reg.h, use that instead of processor.h in assembly code in a few places. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Rename files to have consistent _32/_64 suffixesPaul Mackerras2005-10-101-0/+1399
This doesn't change any code, just renames things so we consistently have foo_32.c and foo_64.c where we have separate 32- and 64-bit versions. Signed-off-by: Paul Mackerras <paulus@samba.org>
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