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* powerpc: Fix old bug in prom_init setting of the colorBenjamin Herrenschmidt2011-12-191-1/+1
| | | | | | We have an array of 16 entries and a loop of 32 iterations... oops. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Only use initrd_end as the limit for alloc_bottom if it's inside ↵Paul Mackerras2011-12-191-8/+9
| | | | | | | | | | | | | | | the RMO. As the kernels and initrd's get bigger boot-loaders and possibly kexec-tools will need to place the initrd outside the RMO. When this happens we end up with no lowmem and the boot doesn't get very far. Only use initrd_end as the limit for alloc_bottom if it's inside the RMO. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Fix comment explaining our VSID layoutAnton Blanchard2011-12-191-4/+3
| | | | | | | | We support 16TB of user address space and half a million contexts so update the comment to reflect this. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Fix wrong divisor in usecs_to_cputimeAndreas Schwab2011-12-192-8/+8
| | | | | | | | | | | | | | | Commit d57af9b (taskstats: use real microsecond granularity for CPU times) renamed msecs_to_cputime to usecs_to_cputime, but failed to update all numbers on the way. This causes nonsensical cpu idle/iowait values to be displayed in /proc/stat (the only user of usecs_to_cputime so far). This also renames __cputime_msec_factor to __cputime_usec_factor, adapting its value and using it directly in cputime_to_usecs instead of doing two multiplications. Signed-off-by: Andreas Schwab <schwab@linux-m68k.org> Acked-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/mm: Fix section mismatch for read_n_cellsDavid Rientjes2011-12-191-1/+1
| | | | | | | | | read_n_cells() cannot be marked as .devinit.text since it is referenced from two functions that are not in that section: of_get_lmb_size() and hot_add_drconf_scn_to_nid(). Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/mm: Fix section mismatch for mark_reserved_regions_for_nidDavid Rientjes2011-12-191-1/+1
| | | | | | | | | | mark_reserved_regions_for_nid() is only called from do_init_bootmem(), which is in .init.text, so it must be in the same section to avoid a section mismatch warning. Reported-by: Subrata Modak <subrata@linux.vnet.ibm.com> Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Add __SANE_USERSPACE_TYPES__ to asm/types.h for LL64Matt Evans2011-12-191-1/+4
| | | | | | | | | | | | PPC64 uses long long for u64 in the kernel, but powerpc's asm/types.h prevents 64-bit userland from seeing this definition, instead defaulting to u64 == long in userspace. Some user programs (e.g. kvmtool) may actually want LL64, so this patch adds a check for __SANE_USERSPACE_TYPES__ so that, if defined, int-ll64.h is included instead. Signed-off-by: Matt Evans <matt@ozlabs.org> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: POWER7 optimised copy_to_user/copy_from_user using VMXAnton Blanchard2011-12-195-2/+744
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a POWER7 optimised copy_to_user/copy_from_user using VMX. For large aligned copies this new loop is over 10% faster, and for large unaligned copies it is over 200% faster. If we take a fault we fall back to the old version, this keeps things relatively simple and easy to verify. On POWER7 unaligned stores rarely slow down - they only flush when a store crosses a 4KB page boundary. Furthermore this flush is handled completely in hardware and should be 20-30 cycles. Unaligned loads on the other hand flush much more often - whenever crossing a 128 byte cache line, or a 32 byte sector if either sector is an L1 miss. Considering this information we really want to get the loads aligned and not worry about the alignment of the stores. Microbenchmarks confirm that this approach is much faster than the current unaligned copy loop that uses shifts and rotates to ensure both loads and stores are aligned. We also want to try and do the stores in cacheline aligned, cacheline sized chunks. If the store queue is unable to merge an entire cacheline of stores then the L2 cache will have to do a read/modify/write. Even worse, we will serialise this with the stores in the next iteration of the copy loop since both iterations hit the same cacheline. Based on this, the new loop does the following things: 1 - 127 bytes Get the source 8 byte aligned and use 8 byte loads and stores. Pretty boring and similar to how the current loop works. 128 - 4095 bytes Get the source 8 byte aligned and use 8 byte loads and stores, 1 cacheline at a time. We aren't doing the stores in cacheline aligned chunks so we will potentially serialise once per cacheline. Even so it is much better than the loop we have today. 4096 - bytes If both source and destination have the same alignment get them both 16 byte aligned, then get the destination cacheline aligned. Do cacheline sized loads and stores using VMX. If source and destination do not have the same alignment, we get the destination cacheline aligned, and use permute to do aligned loads. In both cases the VMX loop should be optimal - we always do aligned loads and stores and are always doing stores in cacheline aligned, cacheline sized chunks. To be able to use VMX we must be careful about interrupts and sleeping. We don't use the VMX loop when in an interrupt (which should be rare anyway) and we wrap the VMX loop in disable/enable_pagefault and fall back to the existing copy_tofrom_user loop if we do need to sleep. The VMX breakpoint of 4096 bytes was chosen using this microbenchmark: http://ozlabs.org/~anton/junkcode/copy_to_user.c Since we are using VMX and there is a cost to saving and restoring the user VMX state there are two broad cases we need to benchmark: - Best case - userspace never uses VMX - Worst case - userspace always uses VMX In reality a userspace process will sit somewhere between these two extremes. Since we need to test both aligned and unaligned copies we end up with 4 combinations. The point at which the VMX loop begins to win is: 0% VMX aligned 2048 bytes unaligned 2048 bytes 100% VMX aligned 16384 bytes unaligned 8192 bytes Considering this is a microbenchmark, the data is hot in cache and the VMX loop has better store queue merging properties we set the breakpoint to 4096 bytes, a little below the unaligned breakpoints. Some future optimisations we can look at: - Looking at the perf data, a significant part of the cost when a task is always using VMX is the extra exception we take to restore the VMX state. As such we should do something similar to the x86 optimisation that restores FPU state for heavy users. ie: /* * If the task has used fpu the last 5 timeslices, just do a full * restore of the math state immediately to avoid the trap; the * chances of needing FPU soon are obviously high now */ preload_fpu = tsk_used_math(next_p) && next_p->fpu_counter > 5; and /* * fpu_counter contains the number of consecutive context switches * that the FPU is used. If this is over a threshold, the lazy fpu * saving becomes unlazy to save the trap. This is an unsigned char * so that after 256 times the counter wraps and the behavior turns * lazy again; this to deal with bursty apps that only use FPU for * a short time */ - We could create a paca bit to mirror the VMX enabled MSR bit and check that first, avoiding multiple calls to calling enable_kernel_altivec. That should help with iovec based system calls like readv. - We could have two VMX breakpoints, one for when we know the user VMX state is loaded into the registers and one when it isn't. This could be a second bit in the paca so we can calculate the break points quickly. - One suggestion from Ben was to save and restore the VSX registers we use inline instead of using enable_kernel_altivec. [BenH: Fixed a problem with preempt and fixed build without CONFIG_ALTIVEC] Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Use rwsem.h from generic locationRichard Kuo2011-12-162-132/+2
| | | | | | | | | As of commit dd472da38, rwsem.h was moved into asm-generic. This patch removes the arch file and points the build at its new location. Signed-off-by: Richard Kuo <rkuo@codeaurora.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge remote-tracking branch 'jwb/next' into nextBenjamin Herrenschmidt2011-12-1620-13/+1158
|\ | | | | | | | | Conflicts: arch/powerpc/platforms/40x/ppc40x_simple.c
| * powerpc/47x: Add support for the new IBM currituck platformTony Breeds2011-12-098-1/+688
| | | | | | | | | | | | | | Based on original work by David 'Shaggy' Kleikamp. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/476fpe: Add 476fpe SoC codeTony Breeds2011-12-096-1/+84
| | | | | | | | | | | | | | Based on original work by David 'Shaggy' Kleikamp. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/boot: Add mfdcrxTony Breeds2011-12-091-0/+6
| | | | | | | | | | | | | | Needed for currituck support. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/boot: Add extended precision shifts to the boot wrapper.Tony Breeds2011-12-091-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The upcomming currituck patches will need to do 64-bit shifts which will fail with undefined symbol without this patch. I looked at linking against libgcc but we can't guarantee that libgcc was compiled with soft-float. Also Using ../lib/div64.S or ../kernel/misc_32.S, this will break the build as the .o's need to be built with different flags for the bootwrapper vs the kernel. So for now the easyest option is to just copy code from arch/powerpc/kernel/misc_32.S I don't think this code changes too often ;P Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/44x: Removing dead CONFIG_PPC47xChristoph Egger2011-12-091-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | CONFIG_PPC47x doesn't exist in Kconfig and no 476 processor calls this function ppc44x_pin_tlb() as it has it's own ppc47x_pin_tlb(). This code is probably an artifact of the original 476 code that shouldn't have made it upstream. Signed-off-by: Christoph Egger <siccegge@cs.fau.de> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/44x: pci: Setup the dma_window properties for each pci_controllerTony Breeds2011-12-091-0/+6
| | | | | | | | | | | | | | Needed if you want to use swiotlb, harmless otherwise. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/44x: pci: Add a want_sdr flag into ppc4xx_pciex_hwopsTony Breeds2011-12-091-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | Currituck doesn't need nor use SDR so aborting the pci setup if there is no sdr-base would be bad. Add a flag to ppc4xx_pciex_hwops for the backends to state if they need SDR and then only complain and abort if they do and it's not found in the device tree. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/44x: pci: Use PCI_BASE_ADDRESS_MEM_PREFETCH rather than magic value.Tony Breeds2011-12-091-1/+1
| | | | | | | | | | Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
| * powerpc/40x: Add APM8018X SOC supportTanmay Inamdar2011-11-305-0/+307
| | | | | | | | | | | | | | | | | | | | | | The AppliedMicro APM8018X embedded processor targets embedded applications that require low power and a small footprint. It features a PowerPC 405 processor core built in a 65nm low-power CMOS process with a five-stage pipeline executing up to one instruction per cycle. The family has 128-kbytes of on-chip memory, a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface. Signed-off-by: Tanmay Inamdar <tinamdar@apm.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
* | powerpc/pmac: Fix SMP kernels on pre-core99 UP machinesBenjamin Herrenschmidt2011-12-161-1/+1
| | | | | | | | | | | | | | The code for "powersurge" SMP would kick in and cause a crash at boot due to the lack of a NULL test. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/pmac: Simplify old pmac PIC interrupt handlingBenjamin Herrenschmidt2011-12-161-28/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the old days, we treated all interrupts from the legacy Apple home made interrupt controllers as level, with a trick reading the "level" register along with the "event" register to work arounds bugs where it would occasionally fail to latch some events. Doing so appeared to work fine for both level and edge interrupts. Later on, we discovered in Darwin source the magic masks that define which interrupts are actually level and which are edge, and implemented a different algorithm, more similar to what Apple does, that treats those differently. I recently discovered however that this caused problems (including loss of interrupts) with an old Wallstreet PowerBook when trying to use the internal modem (connected to a cascaded controller). It looks like some interrupts are treated as edge while they are really level and I'm starting to seriously doubt the correctness of the Darwin code (which has other obvious bugs when you read it, so ...) This patch reverts to our original behaviour of treating everything as a level interrupt. It appears to solve the problems with the modem on the Wallstreet and everything else seems to be working properly as well. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | Merge branch 'kexec' into nextBenjamin Herrenschmidt2011-12-166-203/+214
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| * | powerpc/kdump: Only save CPU state first time through the secondary CPU ↵Anton Blanchard2011-12-081-12/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | capture code We might enter the secondary CPU capture code twice, eg if we have to unstick some CPUs with a system reset. In this case we don't want to overwrite the state on CPUs that had made it into the capture code OK, so use the cpus_state_saved cpumask for that and make it local to crash_ipi_callback. For controlling progress now use atomic_t cpus_in_crash to count how many CPUs have made it into the kdump code, and time_to_dump to tell everyone it's time to dump. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/kdump: Delay before sending IPI on a system resetAnton Blanchard2011-12-081-7/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we enter the kdump code via system reset, wait a bit before sending the IPI to capture all secondary CPUs. Without it we race with the hypervisor that is issuing the system reset to each CPU. If the IPI gets there first the system reset oops output then shows the register state of the IPI handler which is not what we want. I took the opportunity to add defines for all the various delays we have. There's no need for cpu_relax when we are doing an mdelay, so remove them too. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/xics: Reset the CPPR if H_EOI failsAnton Blanchard2011-12-081-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I have an intermittent kdump fail where the hypervisor fails an H_EOI. As a result our CPPR is never reset to 0xff and we no longer accept interrupts. This patch calls icp_hv_set_cppr to reset the CPPR if H_EOI fails, fixing the kdump fail. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Reduce pseries panic timeout from 180s to 10sAnton Blanchard2011-12-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've had a 180 second panic timeout on ppc64 for as long as I can remember. This patch reduces it to 10 seconds on pseries for a few reasons: - Almost all pseries machines have a hypervisor console so panic output will be available in a scrollback buffer. - The 180 seconds impacts our availability, users (other than kernel hackers) just want the box to come back around so it can continue its work. - I spend a lot of my life staring at the 180 second panic timeout. Many pseries machines take minutes to power cycle, so it's quicker to sit through the 180 seconds than it is to power cycle. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Rework die()Anton Blanchard2011-12-082-56/+74
| | | | | | | | | | | | | | | | | | | | | | | | Our die() code was based off a very old x86 version. Update it to mirror the current x86 code. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Cleanup crash/kexec codeAnton Blanchard2011-12-082-19/+3
| | | | | | | | | | | | | | | | | | | | | Remove some unnecessary defines and fix some spelling mistakes. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/kdump: Use setjmp/longjmp to handle kdump and system reset recursionAnton Blanchard2011-12-081-15/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can handle recursion caused by system reset by reusing the crash shutdown fault handler. Since we don't have an OS triggerable NMI, if all CPUs don't make it into kdump then we tell the user to issue a system reset. However if we have a panic timeout set we cannot wait forever and must continue the kdump. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Remove broken and complicated kdump system reset codeAnton Blanchard2011-12-083-101/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have a lot of complicated logic that handles possible recursion between kdump and a system reset exception. We can solve this in a much simpler way using the same setjmp/longjmp tricks xmon does. As a first step, this patch removes the old system reset code. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Give us time to get all oopses out before panickingAnton Blanchard2011-12-081-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've been seeing truncated output when people send system reset info to me. We should see a backtrace for every CPU, but the panic() code takes the box down before they all make it out to the console. The panic code runs unlocked so we also see corrupted console output. If we are going to panic, then delay 1 second before calling into the panic code. Move oops_exit inside the die lock and put a newline between oopses for clarity. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | Merge branch 'ps3' into nextBenjamin Herrenschmidt2011-12-168-147/+154
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| * | | powerpc/ps3: Update ps3_defconfigGeoff Levand2011-12-081-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refresh ps3_defconfig to latest kernel sources and change the options: CONFIG_PPP=m to CONFIG_PPP=n. CONFIG_NAMESPACES=y to CONFIG_NAMESPACES=n CONFIG_NUMA=y to CONFIG_NUMA=n Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/ps3: Add __init to ps3_smp_probeGeoff Levand2011-12-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an __init annotation to the ps3_smp_probe() routine. Fixes build warnings like these when CONFIG_DEBUG_SECTION_MISMATCH=y: WARNING: Section mismatch in reference from the function .ps3_smp_probe() Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/ps3: Fix PS3 repository build warningsGeoff Levand2011-12-081-67/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some PS3 repository.c build warnings when DEBUG is defined. Also change most pr_debug calls to pr_devel calls. Fixes warnings like these: format '%lx' expects type 'long unsigned int', but argument 7 has type 'u64' Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/ps3: Fix hcall lv1_read_repository_nodeGeoff Levand2011-12-082-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lv1 hcall #91 should be named lv1_read_repository_node, and not lv1_get_repository_node_value. Adjust the lv1 hcall table and all calls. Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/ps3: Fix hcall lv1_get_version_infoGeoff Levand2011-12-083-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lv1_get_version_info hcall takes 2, not 1 output arguments. Adjust the lv1 hcall table and all calls. Usage: int lv1_get_version_info(u64 *version_number, u64 *vendor_id) Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/ps3: Fix hcall lv1_get_virtual_address_space_id_of_ppeGeoff Levand2011-12-082-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lv1_get_virtual_address_space_id_of_ppe hcall takes 0, not 1 input arguments. Adjust the lv1 hcall table and all calls. Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/ps3: Fix hcall lv1_net_stop_rx_dmaGeoff Levand2011-12-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lv1_net_stop_tx_dma and net_stop_rx_dma hcalls take 2, not 3 input arguments. Adjust the lv1 hcall table and all calls. Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/ps3: Interrupt code cleanupGeoff Levand2011-12-081-50/+53
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | General code cleanup for PS3 interrupt.c: o Fill out comments for structure members. o Move variables ipi_debug_brk_mask and lock from struct ps3_bmp to struct ps3_private. o Fix pr_debug build errors when DEBUG is defined. o Convert bit operation to set_bit(). o Convert DBG macro from pr_debug to pr_devel o Add new macro FAIL to replace pr_debug calls Signed-off-by: Geoff Levand <geoff@infradead.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | Merge branch 'cpuidle' into nextBenjamin Herrenschmidt2011-12-1612-87/+411
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| * | | powerpc/cpuidle: Handle power_save=offDeepthi Dharwar2011-12-082-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes pseries_idle_driver not to be registered when power_save=off kernel boot option is specified. The cpuidle_disable variable used here is similar to its usage on x86. If cpuidle_disable is set then sysfs entries for cpuidle framework are not created and the required drivers are not loaded. Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Trinabh Gupta <g.trinabh@gmail.com> Signed-off-by: Arun R Bharadwaj <arun.r.bharadwaj@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/cpuidle: Enable cpuidle and directly call cpuidle_idle_call() for ↵Deepthi Dharwar2011-12-082-84/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pSeries This patch enables cpuidle for pSeries and pSeries_idle is directly called from the idle loop. As a result of pSeries_idle, cpuidle driver registered with cpuidle subsystem comes into action. On failure of loading of the driver or cpuidle framework default idle is executed as part of the function. This patch also removes the routines pseries_shared_idle_sleep and pseries_dedicated_idle_sleep as they are now implemented as part of pseries_idle cpuidle driver. Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Trinabh Gupta <g.trinabh@gmail.com> Signed-off-by: Arun R Bharadwaj <arun.r.bharadwaj@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/cpuidle: cpuidle driver for pSeriesDeepthi Dharwar2011-12-088-3/+350
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a back-end cpuidle driver for pSeries based on pseries_dedicated_idle_loop and pseries_shared_idle_loop routines. The driver is built only if CONFIG_CPU_IDLE is set. This cpuidle driver uses global registration of idle states and not per-cpu. Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Trinabh Gupta <g.trinabh@gmail.com> Signed-off-by: Arun R Bharadwaj <arun.r.bharadwaj@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/cpuidle: Add cpu_idle_wait() to allow switching of idle routinesDeepthi Dharwar2011-12-084-0/+34
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides cpu_idle_wait() routine for the powerpc platform which is required by the cpuidle subsystem. This routine is required to change the idle handler on SMP systems. The equivalent routine for x86 is in arch/x86/kernel/process.c but the powerpc implementation is different. cpuidle_disable variable is to enable/disable cpuidle framework if power_save option is set during the boot time. Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Trinabh Gupta <g.trinabh@gmail.com> Signed-off-by: Arun R Bharadwaj <arun.r.bharadwaj@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc: Enable squashfs as a moduleAnton Blanchard2011-12-082-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Most distros use it so we may as well enable it and get regular compile testing. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc/nvram: Add spinlock to oops_to_nvram to prevent oops in compression ↵Anton Blanchard2011-12-081-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | code. When issuing a system reset we almost always oops in the oops_to_nvram code because multiple CPUs are using the deflate work area. Add a spinlock to protect it. To play it safe I'm using trylock to avoid locking up if the NVRAM code oopses. This means we might miss multiple CPUs oopsing at exactly the same time but I think it's best to play it safe for now. Once we are happy with the reliability we can change it to a full spinlock. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Jim Keniston <jkenisto@us.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc: Provide a way for KVM to indicate that NV GPR values are lostPaul Mackerras2011-12-084-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a problem where a CPU thread coming out of nap mode can think it has valid values in the nonvolatile GPRs (r14 - r31) as saved away in power7_idle, but in fact the values have been trashed because the thread was used for KVM in the mean time. The result is that the thread crashes because code that called power7_idle (e.g., pnv_smp_cpu_kill_self()) goes to use values in registers that have been trashed. The bit field in SRR1 that tells whether state was lost only reflects the most recent nap, which may not have been the nap instruction in power7_idle. So we need an extra PACA field to indicate that state has been lost even if SRR1 indicates that the most recent nap didn't lose state. We clear this field when saving the state in power7_idle, we set it to a non-zero value when we use the thread for KVM, and we test it in power7_wakeup_noloss. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc/powernv: Fix problems in onlining CPUsPaul Mackerras2011-12-082-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present, on the powernv platform, if you off-line a CPU that was online, and then try to on-line it again, the kernel generates a warning message "OPAL Error -1 starting CPU n". Furthermore, if the CPU is a secondary thread that was used by KVM while it was off-line, the CPU fails to come online. The first problem is fixed by only calling OPAL to start the CPU the first time it is on-lined, as indicated by the cpu_start field of its PACA being zero. The second problem is fixed by restoring the cpu_start field to 1 instead of 0 when using the CPU within KVM. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | powerpc/pseries: Increase minimum RMO size from 64MB to 256MBAnton Blanchard2011-12-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The minimum RMO size field in ibm,client-architecture is currently ignored, but a future firmware version will rectify that. Since we always get at least 128MB of RMO right now, asking for 64MB is likely to result in boot failures. We should bump it to at least 128MB, but considering all the boot issues we have on 128MB RMO boxes and all new machines have virtual RMO, we may as well set our minimum to 256MB. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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