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path: root/drivers/clk/imx
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* clk: imx: pll14xx: fix clk_pll14xx_wait_lockPeng Fan2019-12-111-1/+1
* clk: imx: clk-imx7ulp: Add missing sentinel of ulp_div_tablePeng Fan2019-12-091-0/+1
* clk: imx: clk-composite-8m: add lock to gate/muxPeng Fan2019-12-091-0/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-12-0110-301/+208
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| *-. Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'c...Stephen Boyd2019-11-2710-287/+208
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| | | * clk: imx: imx8mq: fix sys3_pll_out_selsPeng Fan2019-11-041-2/+2
| | | * clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clockFancy Fang2019-10-281-2/+1
| | | * clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify codePeng Fan2019-10-281-4/+4
| | | * clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify codePeng Fan2019-10-281-6/+6
| | | * clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify codePeng Fan2019-10-281-4/+4
| | | * clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify codePeng Fan2019-10-281-2/+2
| | | * clk: imx7ulp: Correct DDR clock mux optionsAnson Huang2019-10-261-2/+2
| | | * clk: imx7ulp: Correct system clock source option #7Anson Huang2019-10-261-1/+1
| | | * clk: imx: imx8mq: mark sys1/2_pll as fixed clockPeng Fan2019-10-251-6/+2
| | | * clk: imx: imx8mn: mark sys_pll1/2 as fixed clockPeng Fan2019-10-251-26/+20
| | | * clk: imx: imx8mm: mark sys_pll1/2 as fixed clockPeng Fan2019-10-251-26/+20
| | | * clk: imx8mn: Define gates for pll1/2 fixed dividersLeonard Crestez2019-10-251-19/+38
| | | * clk: imx8mm: Define gates for pll1/2 fixed dividersLeonard Crestez2019-10-251-19/+38
| | | * clk: imx8mq: Define gates for pll1/2 fixed dividersLeonard Crestez2019-10-251-20/+41
| | | * clk: imx: clk-pll14xx: Make two variables staticYueHaibing2019-10-141-2/+2
| | | * clk: imx8mq: Add VIDEO2_PLL clockLaurentiu Palcu2019-10-141-0/+4
| | | * clk: imx8mn: Use common 1443X/1416X PLL clock structureAnson Huang2019-10-062-79/+12
| | | * clk: imx8mm: Move 1443X/1416X PLL clock structure to common placeAnson Huang2019-10-063-77/+43
| | | * clk: imx: pll14xx: Fix quick switch of S/K parameterLeonard Crestez2019-10-061-32/+8
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| * | clk: imx: imx8mn: drop unused pll enumPeng Fan2019-10-161-14/+0
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* | clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARMLeonard Crestez2019-10-282-2/+2
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* clk: imx: imx8mn: fix pll mux bitPeng Fan2019-09-171-22/+10
* clk: imx: imx8mm: fix pll mux bitPeng Fan2019-09-171-22/+10
* clk: imx: clk-pll14xx: unbypass PLL by defaultPeng Fan2019-09-171-0/+5
* clk: imx: pll14xx: avoid glitch when set ratePeng Fan2019-09-171-1/+21
* clk: imx: imx8mn: fix audio pll settingPeng Fan2019-08-241-2/+2
* clk: imx8mn: Add necessary frequency support for ARM PLL tableAnson Huang2019-08-191-0/+2
* clk: imx8mn: Add missing rate_count assignment for each PLL structureAnson Huang2019-08-191-0/+7
* clk: imx8mn: fix int pll clk gatePeng Fan2019-08-191-6/+6
* clk: imx8mn: Add GIC clockLeonard Crestez2019-08-191-0/+5
* clk: imx8mn: Fix incorrect parentsLeonard Crestez2019-08-191-7/+7
* clk: imx8mm: Fix incorrect parentsLeonard Crestez2019-08-191-4/+4
* clk: imx8mq: Fix sys3 pll referencesLeonard Crestez2019-08-191-56/+56
* clk: imx8mq: Unregister clks when of_clk_add_provider failedAnson Huang2019-08-121-1/+9
* clk: imx8mm: Unregister clks when of_clk_add_provider failedAnson Huang2019-08-121-1/+6
* clk: imx8mq: Mark AHB clock as criticalAbel Vesa2019-08-031-1/+2
* clk: imx8mn: Keep uart clocks on for early consoleAnson Huang2019-08-031-0/+10
* clk: imx: Remove unused function statementAnson Huang2019-08-031-1/+0
* clk: imx7ulp: Make sure earlycon's clock is enabledAnson Huang2019-08-031-0/+31
* clk: imx8mm: Switch to platform driverAbel Vesa2019-08-031-21/+36
* clk: imx: imx8mm: fix audio pll settingPeng Fan2019-08-031-2/+2
* clk: imx8mm: GPT1 clock mux option #5 should be sys_pll1_80mAnson Huang2019-08-031-1/+1
* clk: imx8mm: Fix typo of pwm3 clock's mux option #4Anson Huang2019-08-031-1/+1
* clk: imx: Remove unused clk based APIAbel Vesa2019-08-031-24/+0
* clk: imx8mq: set correct parent for usb ctrl clocksLi Jun2019-08-031-2/+2
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